CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 100

• Manufacturer Part Number: CS8900-CQ3
• Description: Crystal LAN ISA Ethernet Controller
• Manufacturer: Cirrus Logic

If the host chooses to change bits in the LineCTL
register after initialization, the ModBackoffE bit
and any receive related bit (LoRxSquelch, SerRx-
ON) may be changed at any time. However, the
Auto AUI/10BT and AUIonly bits should not be
changed while the SerTxON bit is set. If any of
these three bits are to be changed, the host should
first clear the SerTxON bit (Register 13, LineCTL,
100
Bit
Bit
A
B
C
6
7
8
9
F
8
9
Table 31. Transmitting Interrupt Configuration
Table 32. Transmit Interrupt Configuration
SQErroriE
Bit Name
Bit Name
Rdy4TxiE
windowiE
AnycolliE
JabberiE
TxUnder
Loss-of-
16colliE
TxOKiE
Out-of-
OvfloiE
CRSiE
TxCol
runiE
Register B, BufCFG
Register 7, TxCFG
When set, there is an interrupt
whenever the CS8900A fails to
detect Carrier Sense after trans-
mitting the preamble (applies to
the AUI only).
When set, there is an interrupt
whenever there is an SQE error.
When set, there is an interrupt
whenever a frame is transmitted
successfully..
When set, there is an interrupt
whenever a late collision is
detected.
When set, there is an interrupt
whenever there is a jabber condi-
tion.
When set, there is an interrupt
whenever there is a collision.
When set, there is an interrupt
whenever the CS8900A attempts
to transmit a single frame 16
times.
When set, there is an interrupt
whenever buffer space becomes
available for a transmit frame
(used with a Transmit Request).
When set, there is an interrupt
whenever ther CS8900A runs out
of data after transmit has started.
When set, there is an interrupt
whenever the TxCol counter
overflows.
Operation
Operation
CIRRUS LOGIC PRODUCT DATA SHEET
Bit 7), and then set it when the changes are com-
plete.
5.7.4 Enabling CRC Generation and Padding
Whenever the host issues a Transmit Request com-
mand, it must indicate whether or not the Cyclic
Redundancy Check (CRC) value should be ap-
pended to the transmit frame, and whether or not
pad bits should be added (if needed). Table 33 de-
scribes how to configure the CS8900A for CRC
generating and padding.
5.7.5 Individual Packet Transmission
Whenever the host has a packet to transmit, it must
issue a Transmit Request to the CS8900A consist-
ing of the following three operations in the exact
order shown:
1) The host must write a Transmit Command to
2) The host must write the frame’s length to the
3) The host must read the BusST register (Regis-
The information written to the TxCMD register
tells the CS8900A how to transmit the next frame.
Inhibit
(Bit C)
CRC
0
1
0
1
the TxCMD register (PacketPage base +
0144h). The contents of the TxCMD register
may be read back from the TxCMD register
(Register 9).
TxLength register (PacketPage base + 0146h).
ter 18)
Table 33. CRC and Paddling Configuration
Crystal LAN™ ISA Ethernet Controller
TxPad
(Bit D)
Dis
0
0
1
1
Register 9, TxCMD
Pad to 64 bytes if necessary
(including CRC).
Send a runt frame if specified
length less than 60 bytes.
Pad to 60 bytes if necessary (with-
out CRC).
Send runt if specified length less
than 64. The CS8900A will not
transmit a frame that is less than 3
bytes.
Operation
CS8900A
DS271PP3