CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 63

• Manufacturer Part Number: CS8900-CQ3
• Description: Crystal LAN ISA Ethernet Controller
• Manufacturer: Cirrus Logic

DS271PP3
4.4.16 Register 13: Line Control
(LineCTL, Read/Write, Address: PacketPage base + 0112h)
LineCTL determines the configuration of the MAC engine and physical interface.
010011
SerRxON
SerTxON
AUIonly
AutoAUI/10BT
ModBackoffE
PolarityDis
2-partDefDis
LoRxSquelch
After reset, if no EEPROM is found by the CS8900A, then the register has the following initial state. If an EEPROM
is found, then the register’s initial value may be set by the EEPROM. See Section 3.3 on page 19.
Reset value is: 0000 0000 0001 0011
CS8900A
Crystal LAN™ ISA Ethernet Controller
SerTxOn
F
7
LoRx Squelch 2-part DefDis
SerRxON
Register.
If SerRxON is cleared while a packet is being received, reception is completed and no subse-
quent receive packets are allowed until SerRxON is set again.
cleared while a packet is being transmitted, transmission is completed and no subsequent
packets are transmitted until SerTxON is set again.
lowing: [Note: 10BASE-T transmitter will be inactive even when selected unless link pulses are
detected or bit DisableLT (register 19) is set.
AUIonly (Bit 8)
When set, the Modified Backoff algorithm is used. (The Modified Backoff algorithm extends the
backoff delay after each of the first three Tx collisions.)
RXD+/RXD- input (see Section 3.11 on page 35). When this bit is clear, the polarity is correct-
ed, if necessary. When set, no effort is made to correct the polarity. This bit is independent of
the PolarityOK bit (Register 14, LineST, Bit C), which reports whether the polarity is normal or
reversed.
DefDis bit clear, the CS8900A uses the standard two-part deferral as defined in ISO/IEC 8802-
3 paragraph 4.2.3.2.1. With the 2-partDefDis bit set, the two-part deferral is disabled.
8802-3 specification. When set, the thresholds are reduced by approximately 6dB. This is use-
ful for operating with "quiet" cables that are longer than 100 meters.
These bits provide an internal address used by the CS8900A to identify this as the Line Control
When set, the receiver is enabled. When clear, no incoming packets pass through the receiver.
When set, the transmitter is enabled. When clear, no transmissions are allowed. If SerTxON is
Bits 8 and 9 are used to select either the AUI or the 10BASE-T interface according to the fol-
See AUIonly (Bit 8) description above.
When clear, the ISO/IEC standard backoff algorithm is used (see Section 3.9 on page 28).
The 10BASE-T receiver automatically determines the polarity of the received signal at the
Before a transmission can begin, the CS8900A follows a deferral procedure. With the 2-part-
When clear, the 10BASE-T receiver squelch thresholds are set to levels defined by the ISO/IEC
E
6
0
1
0>
D
5
CIRRUS LOGIC PRODUCT DATA SHEET
AutoAUI/10BT (Bit 9)
PolarityDis
1
N/A
0
C
4
Mod BackoffE
B
3
Auto-Select
010011
10BASE-T
Physical Interface
AUI
A
2
Auto AUI/10BT
1
9
AUIonly
0
8
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