CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 30

• Manufacturer Part Number: CS8900-CQ3
• Description: Crystal LAN ISA Ethernet Controller
• Manufacturer: Cirrus Logic

ment of both transmit and receive packets. When
the TxPadDis bit (Register 9, TxCMD, Bit D) is
clear, transmit frames will be padded with addition-
al bits to ensure that the receiving station receives a
legal frame (64 bytes, including CRC). When Tx-
PadDis is set, the CS8900A will not add pad bits
and will transmit frames less that 64 bytes. If a
frame is received that is less than 64 bytes (includ-
ing CRC), the Runt bit (Register 4, RxEvent, Bit D)
will be set indicating the arrival of an illegal frame.
3.9.3 Transmit Error Detection and Handling
The MAC engine monitors Ethernet activity and
reports and recovers from a number of error condi-
tions. For transmission, the MAC reports the fol-
lowing errors in the TxEvent register (Register 8)
and BufEvent register (Register C):
3.9.3.1 Loss of Carrier
Whenever the CS8900A is transmitting on the AUI
port, it expects to see its own transmission "looped
back" to its receiver. If it is unable to monitor its
transmission after the end of the preamble, the
MAC reports a loss-of-carrier error by setting the
Loss-of-CRS bit (Register 8, TxEvent, Bit 6). If the
Loss-of-CRSiE bit (Register 7, TxCFG, Bit 6) is
set, the host will be interrupted.
3.9.3.2 SQE Error
After the end of transmission on the AUI port, the
MAC expects to see a collision within 64 bit times.
If no collision is detected, the SQEerror bit (Regis-
ter 8, TxEvent, Bit 7) is set. If the SQEerroriE bit is
set (Register 7, TxCFG, Bit 7), the host is interrupt-
ed. An SQE error may indicate a fault on the AUI
cable or a faulty transceiver (it is assumed that the
attached transceiver supports this function).
3.9.3.3 Out-of-Window (Late) Collision
If a collision is detected after the first 512 bits have
been transmitted, the MAC reports a late collision
by setting the Out-of-window bit (Register 8, Tx-
Event, Bit 9). The MAC then forces a bad CRC and
terminates the transmission. If the Out-of-window-
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CIRRUS LOGIC PRODUCT DATA SHEET
iE bit (Register 7, TxCFG, Bit 9) is set, the host is
interrupted. A late collision may indicate an illegal
network configuration.
3.9.3.4 Jabber Error
If a transmission continues longer than about
26 ms, the MAC disables the transmitter and sets
the Jabber bit (Register 8, TxEvent, Bit A). The
output of the transmitter returns to idle and remains
there until the host issues a new Transmit Com-
mand. If the JabberiE bit (Register 7, TxCFG, Bit
A) is set, the host is interrupted. A Jabber condition
indicates that there may be something wrong with
the CS8900A transmit function. To prevent possi-
ble network faults, the host should clear the trans-
mit buffer. Possible options include:
Reset the chip with either software or hardware re-
set (see Section 3.3 on page 19).
Issue a Force Transmit Command by setting the
Force bit (Register 9, TxCMD, bit 8).
Issue a Transmit Command with the TxLength
field set to zero.
3.9.3.5 Transmit Collision
The MAC counts the number of times an individual
packet must be retransmitted due to network colli-
sions. The collision count is stored in bits B
through E of the TxEvent register (Register 8). If
the packet collides 16 times, transmission of that
packet is terminated and the 16coll bit (Register 8,
TxEvent, Bit F) is set. If the 16colliE bit (Register
7, TxCFG, Bit F) is set, the host will be interrupted
on the 16th collision. A running count of transmit
collisions is recorded in the TxCOL register.
3.9.3.6 Transmit Underrun
If the CS8900A starts transmission of a packet but
runs out of data before reaching the end of frame,
the TxUnderrun bit (Register C, BufEvent, Bit 9) is
set. The MAC then forces a bad CRC and termi-
nates the transmission. If the TxUnderruniE bit
Crystal LAN™ ISA Ethernet Controller
CS8900A
DS271PP3