CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 15

• Manufacturer Part Number: CS8900-CQ3
• Description: Crystal LAN ISA Ethernet Controller
• Manufacturer: Cirrus Logic

DS271PP3
EEDataIn - EEPROM Data In, Input Internal Weak Pullup PIN 6.
ELCS - External Logic Chip Select, Internal Weak Pullup PIN 2.
EEDataOut - EEPROM Data Out,PIN 5.
CSOUT - Chip Select for External Boot PROM, PIN 17.
10BASE-T Interface
TXD+/TXD- - 10BASE-T Transmit, Differential Output Pair PINS 87 and 88.
RXD+/RXD- - 10BASE-T Receive, Differential Input Pair PINS 91 and 92.
Attachment Unit Interface (AUI)
DO+/DO- - AUI Data Out, Differential Output Pair PINS 83 and 84.
DI+/DI- - AUI Data In, Differential Input Pair PINS 79 and 80.
CI+/CI- - AUI Collision In, Differential Input Pair PINS 81 and 82.
General Pins
XTAL[1:2] - Crystal, Input/Output PINS 97 and 98.
CS8900A
Crystal LAN™ ISA Ethernet Controller
Serial input used to receive data from the EEPROM. Connects to the DO pin on the EEPROM.
EEDataIn is also used to sense the presence of the EEPROM.
Bi-directional signal used to configure external Latchable Address (LA) decode logic. If
external LA decode logic is not needed, ELCS should be tied low.
Serial output used to send data to the EEPROM. Connects to the DI pin on the EEPROM.
When TEST is low, this pin becomes the output for the Boundary Scan Test.
Active-low output used to select an external Boot PROM when the CS8900A decodes a valid
Boot PROM memory address.
Differential output pair drives 10 Mb/s Manchester-encoded data to the 10BASE-T transmit
pair.
Differential input pair receives 10 Mb/s Manchester-encoded data from the 10BASE-T receive
pair.
Differential output pair drives 10 Mb/s Manchester-encoded data to the AUI transmit pair.
Differential input pair receives 10 Mb/s Manchester-encoded data from the AUI receive pair.
Differential input pair connects to the AUI collision pair. A collision is indicated by the
presence of a 10 MHz ± 15% signal with duty cycle no worse than 60/40.
A 20 MHz crystal should be connected across these pins. If a crystal is not used, a 20 MHz
signal should be connected to XTAL1 and XTAL2 should be left open. (See Section 7.3 on
page 111 and Section 7.7 on page 121.)
CIRRUS LOGIC PRODUCT DATA SHEET
15