CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 5

• Manufacturer Part Number: CS8900-CQ3
• Description: Crystal LAN ISA Ethernet Controller
• Manufacturer: Cirrus Logic

DS271PP3
5.0 OPERATION ............................................................................................................................................. 79
CS8900A
Crystal LAN™ ISA Ethernet Controller
4.5 Initiate Transmit Registers .................................................................................................................. 71
4.6 Address Filter Registers...................................................................................................................... 72
4.7 Receive and Transmit Frame Locations ............................................................................................. 73
4.8 Eight and Sixteen Bit Transfers........................................................................................................... 73
4.9 Memory Mode Operation .................................................................................................................... 74
4.10 I/O Space Operation ......................................................................................................................... 76
5.1 Managing Interrupts and Servicing the Interrupt Status Queue .......................................................... 79
5.2 Basic Receive Operation..................................................................................................................... 79
4.4.8 Register 5: Receiver Control ................................................................................................... 55
4.4.9 Register 7: Transmit Configuration .......................................................................................... 56
4.4.10 Register 8: Transmitter Event ................................................................................................ 57
4.4.11 Register 9: Transmit Command Status ................................................................................. 58
4.4.12 Register B: Buffer Configuration ............................................................................................ 59
4.4.13 Register C: Buffer Event ........................................................................................................ 60
4.4.14 Register 10: Receiver Miss Counter ...................................................................................... 61
4.4.15 Register 10: Transmit Collision Counter ................................................................................ 62
4.4.16 Register 13: Line Control ....................................................................................................... 63
4.4.17 Register 14: Line Status ........................................................................................................ 64
4.4.18 Register 15: Self Control ....................................................................................................... 65
4.4.19 Register 16: Self Status ......................................................................................................... 66
4.4.20 Register 17: Bus Control ....................................................................................................... 67
4.4.21 Register 18: Bus Status ......................................................................................................... 68
4.4.22 Register 19: Test Control ....................................................................................................... 69
4.4.23 Register 1C: AUI Time Domain Reflectometer ...................................................................... 70
4.5.1 Transmit Command Request - TxCMD .................................................................................... 71
4.5.2 Transmit Length ........................................................................................................................ 71
4.6.1 Logical Address Filter (hash table) ........................................................................................... 72
4.6.2 Individual Address (IEEE address) ........................................................................................... 72
4.7.1 Receive PacketPage Locations ................................................................................................. 73
4.7.2 Transmit Locations .................................................................................................................... 73
4.8.1 Transferring Odd-Byte-Aligned Data ......................................................................................... 74
4.8.2 Random Access to CS8900A Memory ...................................................................................... 74
4.9.1 Accesses in Memory Mode ....................................................................................................... 74
4.9.2 Configuring the CS8900A for Memory Mode............................................................................. 74
4.9.3 Basic Memory Mode Transmit ................................................................................................... 75
4.9.4 Basic Memory Mode Receive .................................................................................................... 75
4.9.5 Polling the CS8900A in Memory Mode...................................................................................... 76
4.10.1 Receive/Transmit Data Ports 0 and 1...................................................................................... 76
4.10.2 TxCMD Port............................................................................................................................. 76
4.10.3 TxLength Port .......................................................................................................................... 76
4.10.4 Interrupt Status Queue Port..................................................................................................... 76
4.10.5 PacketPage Pointer Port ......................................................................................................... 76
4.10.6 PacketPage Data Ports 0 and 1 .............................................................................................. 77
4.10.7 I/O Mode Operation ................................................................................................................. 77
4.10.8 Basic I/O Mode Transmit ......................................................................................................... 77
4.10.9 Basic I/O Mode Receive .......................................................................................................... 77
4.10.10 Accessing Internal Registers ................................................................................................. 78
4.10.11 Polling the CS8900A in I/O Mode.......................................................................................... 78
5.2.1 Terminology: Packet, Frame, and Transfer ............................................................................... 81
5.2.0.1 Overview .......................................................................................................................... 79
5.2.1.1 Packet .............................................................................................................................. 81
5.2.1.2 Frame............................................................................................................................... 81
CIRRUS LOGIC PRODUCT DATA SHEET
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