CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 78
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CS8900-CQ3
Manufacturer Part Number
CS8900-CQ3
Description
Crystal LAN ISA Ethernet Controller
Manufacturer
Cirrus Logic
Datasheet
1.CS8900-CQ3.pdf
(128 pages)
- Current page: 78 of 128
- Download datasheet (2Mb)
For a more detailed description of receive, see
Section 5.2 on page 79.
4.10.10 Accessing Internal Registers
To access any of the CS8900A’s internal registers
in I/O Mode, the host must first setup the Pack-
etPage Pointer. It does this by writing the Pack-
etPage address of the target register to the
PacketPage Pointer Port (I/O base + 000Ah). The
78
host memory. Preceding the frame data are the
contents of the RxStatus register (PacketPage
base + 0400h) and the RxLength register (Pack-
etPage base + 0402h).
CIRRUS LOGIC PRODUCT DATA SHEET
contents of the target register is then mapped into
the PacketPage Data Port (I/O base + 000Ch).
If the host needs to access a sequential block of reg-
isters, the MSB of the PacketPage address of the
first word to be accessed should be set to "1". The
PacketPage Pointer will then move to the next word
location automatically, eliminating the need to set-
up the PacketPage Pointer between successive ac-
cesses (see Figure 18).
4.10.11 Polling the CS8900A in I/O Mode
If interrupts are not used, the host can poll the
CS8900A to check if receive frames are present
and if memory space is available for transmit.
Crystal LAN™ ISA Ethernet Controller
CS8900A
DS271PP3
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