CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 14

• Manufacturer Part Number: CS8900-CQ3
• Description: Crystal LAN ISA Ethernet Controller
• Manufacturer: Cirrus Logic

IOCS16 - I/O Chip Select 16-bit, Open Drain Output PIN 33.
IOCHRDY - I/O Channel Ready, Open Drain Output PIN 64.
SBHE - System Bus High Enable, Input PIN 36.
INTRQ[0:2] - Interrupt Request, 3-State PINS 30-32, 35.
DMARQ[0:2] - DMA Request, 3-State PINS 11, 13, and 15.
DMACK[0:2] - DMA Acknowledge, Input PINS 12, 14, and 16.
CHIPSEL - Chip Select, Input PIN 7.
EEPROM and Boot PROM Interface
EESK - EEPROM Serial Clock, PIN 4.
EECS - EEPROM Chip Select, PIN 3.
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Open-drain, active-low output generated by the CS8900A when it recognizes an address on the
ISA bus that corresponds to its assigned I/O space. 3-Stated when not active.
When driven low, this open-drain, active-high output extends I/O Read and Memory Read
cycles to the CS8900A. This output is functional when the IOCHRDYE bit in the Bus Control
register (Register 17) is clear. This pin is always 3-Stated when the IOCHRDYE bit is set.
Active-low input indicates a data transfer on the high byte of the System Data Bus (SD8-
SD15). After a hardware or a software reset, provide a HIGH to LOW and then LOW to HIGH
transition on SBHE signal before any IO or memory access is done to the CS8900A.
Active-high output indicates the presence of an interrupt event. Interrupt Request goes low once
the Interrupt Status Queue (ISQ) is read as all 0’s. Only one Interrupt Request output is used
(one is selected during configuration). All non-selected Interrupt Request outputs are placed in
a high-impedance state. (Section 3.2 on page 18 and Section 5.1 on page 79.)
Active-high, 3-Stateable output used by the CS8900A to request a DMA transfer. Only one
DMA Request output is used (one is selected during configuration). All non-selected DMA
Request outputs are placed in a high-impedance state.
Active-low input indicates acknowledgment by the host of the corresponding DMA Request
output.
Active-low input generated by external Latchable Address bus decode logic when a valid
memory address is present on the ISA bus. If Memory Mode operation is not needed,
CHIPSEL should be tied low. The CHIPSEL is ignored for IO and DMA mode of the
CS8900A.
Serial clock used to clock data into or out of the EEPROM.
Active-high output used to select the EEPROM.
CIRRUS LOGIC PRODUCT DATA SHEET
Crystal LAN™ ISA Ethernet Controller
CS8900A
DS271PP3