CS8900-CQ3 Cirrus Logic, CS8900-CQ3 Datasheet - Page 97
CS8900-CQ3
Manufacturer Part Number
CS8900-CQ3
Description
Crystal LAN ISA Ethernet Controller
Manufacturer
Cirrus Logic
Datasheet
1.CS8900-CQ3.pdf
(128 pages)
- Current page: 97 of 128
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DS271PP3
CS8900A
Crystal LAN™ ISA Ethernet Controller
Entering this example, the receive buffer is empty and the
DMA Frame Count (PacketPage base + 0028h) is zero.
Frame 1 received and completely stored in on-chip RAM.
Frame 2 received and completely stored in on-chip RAM.
At this point, the CS8900A does not have sufficient buffer
space for another complete large frame (1518 bytes).
Frame 3 starts to be received and passes the DA filter.
This activates Auto-Switch DMA.
Frame 1 is placed in host memory via DMA freeing
space for the incoming Frame 3. The CS8900A updates
the DMA Frame Count, DMA Start of Frame and DMA
Byte Count registers. It then sets the RxDMA DMAFrame
bit and generates an interrupt.
Frame 2 is placed in host memory via DMA and the
CS8900A updates the DMA registers.
The host responds to the RxDMAFrame interrupt, and
reads the Frame Count register, which is cleared when
read. Since there are no receive interrupts pending, the
CS8900A exits DMA (assumes Frame 3 is still coming in).
Frame 3 is completely buffered in on-chip RAM, and
awaits processing by the host.
CIRRUS LOGIC PRODUCT DATA SHEET
Figure 27. Example of Auto-Switch DMA
Enter Example Here
Exit Example
Time
Receive DMA used
during this time.
97
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