MCP1631RD-MCC1 Microchip Technology, MCP1631RD-MCC1 Datasheet - Page 122

REFERENCE DESIGN FOR MCP1631HV

MCP1631RD-MCC1

Manufacturer Part Number
MCP1631RD-MCC1
Description
REFERENCE DESIGN FOR MCP1631HV
Manufacturer
Microchip Technology
Type
Battery Managementr

Specifications of MCP1631RD-MCC1

Main Purpose
Power Management, Battery Charger
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP1631HV, PIC16F883
Primary Attributes
1 ~ 2 Cell- Li-Ion, 1 ~ 4 Cell- NiCd/NiMH
Secondary Attributes
Status LEDs
Supported Devices
MCP1631HV, PIC16F883 Device Type
Tool / Board Applications
Power Management-Battery Management
Development Tool Type
Reference Design
Input Voltage
5.5 V to 16 V
Product
Power Management Modules
Mcu Supported Families
MCP1631HV/PIC16F883 Family
Silicon Manufacturer
Microchip
Silicon Core Number
MCP1631HV
Kit Application Type
Reference Design
Application Sub Type
Battery Charger
Kit Contents
Board Only
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MCP1631HV, PIC16F883
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F882/883/884/886/887
10.3
Depending on the application, good programming
practice may dictate that the value written to the data
EEPROM should be verified (see Example 10-5) to the
desired value to be written.
EXAMPLE 10-5:
10.3.1
The data EEPROM is a high-endurance, byte
addressable array that has been optimized for the
storage of frequently changing information (e.g.,
program variables or other data that are updated often).
When variables in one section change frequently, while
variables in another section do not change, it is possible
to exceed the total number of write cycles to the
EEPROM (specification D124) without exceeding the
total number of write cycles to a single byte
(specifications D120 and D120A). If this is the case,
then a refresh of the array must be performed. For this
reason, variables that change infrequently (such as
constants, IDs, calibration, etc.) should be stored in
Flash program memory.
10.4
There are conditions when the user may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built in. On power-up, WREN is cleared. Also, the
Power-up
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during:
• Brown-out
• Power Glitch
• Software Malfunction
10.5
Data memory can be code-protected by programming
the CPD bit in the Configuration Word Register 1
(Register 14-1) to ‘0’.
DS41291F-page 120
BANKSEL EEDAT
MOVF
BANKSEL EECON1
BSF
BANKSEL EEDAT
XORWF
BTFSS
GOTO
:
BCF
Write Verify
Protection Against Spurious Write
Data EEPROM Operation During
Code-Protect
EEDAT, W
EECON1, RD
EEDAT, W
STATUS, Z
WRITE_ERR
STATUS, RP1
USING THE DATA EEPROM
Timer
WRITE VERIFY
(64 ms
;
;EEDAT not changed
;from previous write
;
;YES, Read the
;value written
;
;
;Is data the same
;No, handle error
;Yes, continue
;Bank 0
duration)
prevents
When the data memory is code-protected, only the
CPU is able to read and write data to the data
EEPROM. It is recommended to code-protect the pro-
gram memory when code-protecting data memory.
This prevents anyone from programming zeroes over
the existing code (which will execute as NOPs) to reach
an added routine, programmed in unused program
memory, which outputs the contents of data memory.
Programming unused locations in program memory to
‘0’ will also help prevent data memory code protection
from becoming breached.
© 2009 Microchip Technology Inc.

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