MCP1631RD-MCC1 Microchip Technology, MCP1631RD-MCC1 Datasheet - Page 169

• Manufacturer Part Number: MCP1631RD-MCC1
• Description: REFERENCE DESIGN FOR MCP1631HV
• Manufacturer: Microchip Technology
• Type: Battery Managementr

Specifications of MCP1631RD-MCC1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: MCP1631HV, PIC16F883
• Primary Attributes: 1 ~ 2 Cell- Li-Ion, 1 ~ 4 Cell- NiCd/NiMH
• Secondary Attributes: Status LEDs
• Supported Devices: MCP1631HV, PIC16F883 Device Type
• Tool / Board Applications: Power Management-Battery Management
• Development Tool Type: Reference Design
• Input Voltage: 5.5 V to 16 V
• Product: Power Management Modules
• Mcu Supported Families: MCP1631HV/PIC16F883 Family
• Silicon Manufacturer: Microchip
• Silicon Core Number: MCP1631HV
• Kit Application Type: Reference Design
• Application Sub Type: Battery Charger
• Kit Contents: Board Only
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MCP1631HV, PIC16F883
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.3.1
The EUSART module supports automatic detection
and calibration of the baud rate.
In the Auto-Baud Detect (ABD) mode, the clock to the
BRG is reversed. Rather than the BRG clocking the
incoming RX signal, the RX signal is timing the BRG.
The Baud Rate Generator is used to time the period of
a received 55h (ASCII “U”) which is the Sync character
for the LIN bus. The unique feature of this character is
that it has five rising edges including the Stop bit edge.
Setting the ABDEN bit of the BAUDCTL register starts
the auto-baud calibration sequence (Figure 12-6).
While the ABD sequence takes place, the EUSART
state machine is held in Idle. On the first rising edge of
the receive line, after the Start bit, the SPBRG begins
counting up using the BRG counter clock as shown in
Table 12-6. The fifth rising edge will occur on the RX pin
at the end of the eighth bit period. At that time, an
accumulated value totaling the proper BRG period is
left in the SPBRGH, SPBRG register pair, the ABDEN
bit is automatically cleared and the RCIF interrupt flag
is set. The value in the RCREG needs to be read to
clear the RCIF interrupt. RCREG content should be
discarded. When calibrating for modes that do not use
the SPBRGH register the user can verify that the
SPBRG register did not overflow by checking for 00h in
the SPBRGH register.
The BRG auto-baud clock is determined by the BRG16
and BRGH bits as shown in Table 12-6. During ABD,
both the SPBRGH and SPBRG registers are used as a
16-bit counter, independent of the BRG16 bit setting.
While calibrating the baud rate period, the SPBRGH
FIGURE 12-6:
© 2009 Microchip Technology Inc.
BRG Value
BRG Clock
ABDEN bit
RCIF bit
(Interrupt)
SPBRGH
RCREG
SPBRG
RX pin
RCIDL
Note 1:
Read
AUTO-BAUD DETECT
Set by User
The ABD sequence requires the EUSART module to be configured in Asynchronous mode
XXXXh
AUTOMATIC BAUD RATE CALIBRATION
0000h
Start
PIC16F882/883/884/886/887
bit 0
XXh
XXh
Edge #1
bit 1
bit 2
Edge #2
and SPBRG registers are clocked at 1/8th the BRG
base clock rate. The resulting byte measurement is the
average bit time when clocked at full speed.
TABLE 12-6:
BRG16
Note:
Note 1: If the WUE bit is set with the ABDEN bit,
bit 3
0
0
1
1
2: It is up to the user to determine that the
3: During the auto-baud process, the auto-
bit 4
Edge #3
BRGH
During the ABD sequence, SPBRG and
SPBRGH registers are both used as a 16-bit
counter, independent of BRG16 setting.
auto-baud detection will occur on the byte
following the Break character (see
Section 12.3.2
Break”).
incoming character baud rate is within the
range of the selected BRG clock source.
Some combinations of oscillator frequency
and EUSART baud rates are not possible.
baud counter starts counting at 1. Upon
completion of the auto-baud sequence, to
achieve maximum accuracy, subtract 1
from the SPBRGH:SPBRG register pair.
0
1
0
1
bit 5
BRG COUNTER CLOCK RATES
BRG Base
bit 6
Edge #4
F
F
F
F
Clock
OSC
OSC
OSC
OSC
bit 7
/64
/16
/16
/4
“Auto-Wake-up
DS41291F-page 167
Stop bit
Edge #5
Auto Cleared
BRG ABD
001Ch
F
F
F
F
1Ch
00h
OSC
OSC
OSC
Clock
OSC
/512
/128
/128
/32
on