MCP1631RD-MCC1 Microchip Technology, MCP1631RD-MCC1 Datasheet - Page 163

• Manufacturer Part Number: MCP1631RD-MCC1
• Description: REFERENCE DESIGN FOR MCP1631HV
• Manufacturer: Microchip Technology
• Type: Battery Managementr

Specifications of MCP1631RD-MCC1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: MCP1631HV, PIC16F883
• Primary Attributes: 1 ~ 2 Cell- Li-Ion, 1 ~ 4 Cell- NiCd/NiMH
• Secondary Attributes: Status LEDs
• Supported Devices: MCP1631HV, PIC16F883 Device Type
• Tool / Board Applications: Power Management-Battery Management
• Development Tool Type: Reference Design
• Input Voltage: 5.5 V to 16 V
• Product: Power Management Modules
• Mcu Supported Families: MCP1631HV/PIC16F883 Family
• Silicon Manufacturer: Microchip
• Silicon Core Number: MCP1631HV
• Kit Application Type: Reference Design
• Application Sub Type: Battery Charger
• Kit Contents: Board Only
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MCP1631HV, PIC16F883
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 12-2:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
SPEN
SPEN: Serial Port Enable bit
1 = Serial port enabled (configures RX/DT and TX/CK pins as serial port pins)
0 = Serial port disabled (held in Reset)
RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
SREN: Single Receive Enable bit
Asynchronous mode:
Don’t care
Synchronous mode – Master:
1 = Enables single receive
0 = Disables single receive
This bit is cleared after reception is complete.
Synchronous mode – Slave
Don’t care
CREN: Continuous Receive Enable bit
Asynchronous mode:
1 = Enables receiver
0 = Disables receiver
Synchronous mode:
1 = Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0 = Disables continuous receive
ADDEN: Address Detect Enable bit
Asynchronous mode 9-bit (RX9 = 1):
1 = Enables address detection, enable interrupt and load the receive buffer when RSR<8> is set
0 = Disables address detection, all bytes are received and ninth bit can be used as parity bit
Asynchronous mode 8-bit (RX9 = 0):
Don’t care
FERR: Framing Error bit
1 = Framing error (can be updated by reading RCREG register and receive next valid byte)
0 = No framing error
OERR: Overrun Error bit
1 = Overrun error (can be cleared by clearing bit CREN)
0 = No overrun error
RX9D: Ninth bit of Received Data
This can be address/data bit or a parity bit and must be calculated by user firmware.
R/W-0
RX9
RCSTA: RECEIVE STATUS AND CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
SREN
PIC16F882/883/884/886/887
R/W-0
CREN
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADDEN
R/W-0
FERR
R-0
(1)
x = Bit is unknown
OERR
R-0
DS41291F-page 161
RX9D
R-x
bit 0