MCP1631RD-MCC1 Microchip Technology, MCP1631RD-MCC1 Datasheet - Page 128

REFERENCE DESIGN FOR MCP1631HV

MCP1631RD-MCC1

Manufacturer Part Number
MCP1631RD-MCC1
Description
REFERENCE DESIGN FOR MCP1631HV
Manufacturer
Microchip Technology
Type
Battery Managementr

Specifications of MCP1631RD-MCC1

Main Purpose
Power Management, Battery Charger
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
MCP1631HV, PIC16F883
Primary Attributes
1 ~ 2 Cell- Li-Ion, 1 ~ 4 Cell- NiCd/NiMH
Secondary Attributes
Status LEDs
Supported Devices
MCP1631HV, PIC16F883 Device Type
Tool / Board Applications
Power Management-Battery Management
Development Tool Type
Reference Design
Input Voltage
5.5 V to 16 V
Product
Power Management Modules
Mcu Supported Families
MCP1631HV/PIC16F883 Family
Silicon Manufacturer
Microchip
Silicon Core Number
MCP1631HV
Kit Application Type
Reference Design
Application Sub Type
Battery Charger
Kit Contents
Board Only
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MCP1631HV, PIC16F883
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F882/883/884/886/887
11.3
In Capture mode, the CCPRxH, CCPRxL register pair
captures the 16-bit value of the TMR1 register when an
event occurs on pin CCPx. An event is defined as one
of the following and is configured by the CCP1M<3:0>
bits of the CCP1CON register:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the Interrupt Request Flag bit
CCPxIF of the PIRx register is set. The interrupt flag
must be cleared in software. If another capture occurs
before the value in the CCPRxH, CCPRxL register pair
is read, the old captured value is overwritten by the new
captured value (see Figure 11-1).
11.3.1
In Capture mode, the CCPx pin should be configured
as an input by setting the associated TRIS control bit.
FIGURE 11-1:
DS41291F-page 126
CCPx
pin
Note:
System Clock (F
Capture Mode
Edge Detect
CCP PIN CONFIGURATION
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
Prescaler
÷ 1, 4, 16
and
CCPxCON<3:0>
OSC
)
Set Flag bit CCPxIF
(PIRx register)
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
Capture
Enable
CCPRxH
TMR1H
CCPRxL
TMR1L
11.3.2
Timer1 must be running in Timer mode or Synchronized
Counter mode for the CCP module to use the capture
feature. In Asynchronous Counter mode, the capture
operation may not work.
11.3.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit of the PIEx register clear to
avoid false interrupts. Additionally, the user should
clear the CCPxIF interrupt flag bit of the PIRx register
following any change in Operating mode.
11.3.4
There are four prescaler settings specified by the
CCPxM<3:0> bits of the CCPxCON register. Whenever
the CCP module is turned off, or the CCP module is not
in Capture mode, the prescaler counter is cleared. Any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another does not
clear the prescaler and may generate a false interrupt. To
avoid this unexpected operation, turn the module off by
clearing the CCPxCON register before changing the
prescaler (see Example 11-1).
EXAMPLE 11-1:
BANKSEL CCP1CON
CLRF
MOVLW
MOVWF
CCP1CON
NEW_CAPT_PS ;Load the W reg with
CCP1CON
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT
CCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
;Set Bank bits to point
;to CCP1CON
;Turn CCP module off
; the new prescaler
; move value and CCP ON
;Load CCP1CON with this
; value
© 2009 Microchip Technology Inc.

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