MCP1631RD-MCC1 Microchip Technology, MCP1631RD-MCC1 Datasheet - Page 131

• Manufacturer Part Number: MCP1631RD-MCC1
• Description: REFERENCE DESIGN FOR MCP1631HV
• Manufacturer: Microchip Technology
• Type: Battery Managementr

Specifications of MCP1631RD-MCC1

• Main Purpose: Power Management, Battery Charger
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: MCP1631HV, PIC16F883
• Primary Attributes: 1 ~ 2 Cell- Li-Ion, 1 ~ 4 Cell- NiCd/NiMH
• Secondary Attributes: Status LEDs
• Supported Devices: MCP1631HV, PIC16F883 Device Type
• Tool / Board Applications: Power Management-Battery Management
• Development Tool Type: Reference Design
• Input Voltage: 5.5 V to 16 V
• Product: Power Management Modules
• Mcu Supported Families: MCP1631HV/PIC16F883 Family
• Silicon Manufacturer: Microchip
• Silicon Core Number: MCP1631HV
• Kit Application Type: Reference Design
• Application Sub Type: Battery Charger
• Kit Contents: Board Only
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MCP1631HV, PIC16F883
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.5.1
The PWM period is specified by the PR2 register of
Timer2. The PWM period can be calculated using the
formula of Equation 11-1.
EQUATION 11-1:
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCPx pin is set. (Exception: If the PWM duty
• The PWM duty cycle is latched from CCPRxL into
© 2009 Microchip Technology Inc.
cycle = 0%, the pin will not be set.)
CCPRxH.
Note:
Note:
PWM Period
PWM PERIOD
The Timer2 postscaler (see Section 7.1
“Timer2 Operation”) is not used in the
determination of the PWM frequency.
T
OSC
=
= 1/F
(TMR2 Prescale Value)
[
PWM PERIOD
(
PR2
OSC
)
+
1
] 4 T
•
•
OSC
•
PIC16F882/883/884/886/887
11.5.2
The PWM duty cycle is specified by writing a 10-bit
value to multiple registers: CCPRxL register and
DCxB<1:0> bits of the CCPxCON register. The
CCPRxL contains the eight MSbs and the DCxB<1:0>
bits of the CCPxCON register contain the two LSbs.
CCPRxL and DCxB<1:0> bits of the CCPxCON
register can be written to at any time. The duty cycle
value is not latched into CCPRxH until after the period
completes (i.e., a match between PR2 and TMR2
registers occurs). While using the PWM, the CCPRxH
register is read-only.
Equation 11-2 is used to calculate the PWM pulse
width.
Equation 11-3 is used to calculate the PWM duty cycle
ratio.
EQUATION 11-2:
EQUATION 11-3:
The CCPRxH register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMR2 register is concatenated with
either the 2-bit internal system clock (F
the prescaler, to create the 10-bit time base. The system
clock is used if the Timer2 prescaler is set to 1:1.
When the 10-bit time base matches the CCPRxH and
2-bit latch, then the CCPx pin is cleared (see
Figure 11-3).
Duty Cycle Ratio
Pulse Width
PWM DUTY CYCLE
=
(
T
=
CCPRxL:CCPxCON<5:4>
OSC
PULSE WIDTH
DUTY CYCLE RATIO
(
---------------------------------------------------------------------- -
CCPRxL:CCPxCON<5:4>
•
(TMR2 Prescale Value)
4 PR2
(
DS41291F-page 129
+
OSC
1
)
), or 2 bits of
)
•
)