AT91RM3400-DK Atmel, AT91RM3400-DK Datasheet - Page 129
![KIT DEV FOR AT91RM3400](/photos/9/21/92145/at91rm3400-dk__bottom__sml.jpg)
AT91RM3400-DK
Manufacturer Part Number
AT91RM3400-DK
Description
KIT DEV FOR AT91RM3400
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91RM3400-DK.pdf
(461 pages)
2.AT91RM3400-DK.pdf
(2 pages)
3.AT91RM3400-DK.pdf
(25 pages)
Specifications of AT91RM3400-DK
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT91RM3400
Data Bus Width
32 bit
Interface Type
RS-232, USB
For Use With/related Products
AT91RM3400
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 129 of 461
- Download datasheet (6Mb)
Slow Clock Oscillator
Slow Clock Oscillator
Connection
Slow Clock Oscillator Startup
Time
1790A–ATARM–11/03
Figure 36. Clock Generator Block Diagram
The Clock Generator integrates a low-power 32.768 kHz oscillator. The XIN32 and
XOUT32 pins must be connected to a 32.768 kHz crystal. Two external capacitors must
be wired as shown in Figure 37.
Figure 37. Typical Slow Clock Oscillator Connection
The startup time of the Slow Clock Oscillator is given in the section “DC Characteristics”
on page 432. As it is often higher than 500 ms and the processor requires an assertion
of the reset until it has stabilized, the user must implement an external reset supervisor
covering this startup time. However, this startup is only required in case of cold reset,
i.e. in case of system power-up. When a warm reset occurs, the length of the reset pulse
may be much lower. For further details, see the section “Reset Controller” on page 77.
XOUT32
PLLRCA
PLLRCB
XIN32
XOUT
XIN
C
Main Clock
Slow Clock
Frequency
Oscillator
Oscillator
L1
Counter
Main
XIN32
32.768 kHz
Crystal
Clock Generator
Divider A
Divider B
C
L2
XOUT32
PLL A
PLL B
GNDPLL
AT91RM3400
(optional)
/2
Clock
PLLA
PLLB
SLCK
Slow
Clock
Clock
Main
Clock
129
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