AT91RM3400-DK Atmel, AT91RM3400-DK Datasheet - Page 261

• Manufacturer Part Number: AT91RM3400-DK
• Description: KIT DEV FOR AT91RM3400
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91RM3400-DK

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT91RM3400
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• For Use With/related Products: AT91RM3400
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TWI Internal Address Register
Register Name:
Access Type:
• IADR: Internal Address
0, 1, 2 or 3 bytes depending on IADRSZ.
TWI Clock Waveform Generator Register
Register Name:
Access Type:
• CLDIV: Clock Low Divider
The TWCK low period is defined as follows:
• CHDIV: Clock High Divider
The TWCK high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both TWCK high and low periods.
1790A–ATARM–11/03
T
T
low
high
=
=
31
23
15
31
23
15
–
7
–
–
7
CLDIV
CHDIV
2
2
CKDIV
CKDIV
30
22
14
30
22
14
TWI_IADR
Read/write
–
6
TWI_CWGR
Read/write
–
–
6
+
+
3
3
T
T
MCK
MCK
29
21
13
29
21
13
–
5
–
–
5
28
20
12
28
20
12
–
4
–
–
4
CHDIV
CLDIV
IADR
IADR
IADR
27
19
11
27
19
11
–
3
–
–
3
26
18
10
26
18
10
–
2
–
2
CKDIV
AT91RM3400
25
17
25
17
–
9
1
–
9
1
24
16
24
16
–
8
0
–
8
0
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