AT91RM3400-DK Atmel, AT91RM3400-DK Datasheet - Page 4

• Manufacturer Part Number: AT91RM3400-DK
• Description: KIT DEV FOR AT91RM3400
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91RM3400-DK

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT91RM3400
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• For Use With/related Products: AT91RM3400
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Key Features
ARM7TDMI Processor
Debug and Test
Boot ROM Program
Embedded Software
Services
Reset Controller
Memory Controller
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AT91RM3400
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ARM7TDMI Based on ARMv4T Architecture
Two Instruction Sets
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Three-Stage Pipeline Architecture
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Integrated Embedded In-circuit Emulator
Debug Unit
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IEEE1149.1 JTAG Boundary-scan on All Digital Pins
Default Boot Program stored in ROM-based products
Downloads and runs an application from external storage media into internal SRAM
Downloaded code size depends on embedded SRAM size
Automatic detection of valid application
Bootloader supporting a wide range of non-volatile memories
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Boot Uploader in case no valid program is detected in external NVM and supporting
several communication media
Serial communication on a DBGU (XModem protocol)
USB Device Port (DFU Protocol)
Compliant with ATPCS
Compliant with ANSI/ISO Standard C
Compiled in ARM/Thumb Interworking
ROM Entry Service
Tempo, Xmodem and DataFlash services
CRC and Sine tables
One reset line providing
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Bus Arbiter
ARM
Thumb
Instruction Fetch (F)
Instruction Decode (D)
Execute (E)
Two-pin UART
Debug Communication Channel
Chip ID Register
SPI DataFlash
Two-wire EEPROM
Initialization of the User Interface registers (defined in the user interface of
each peripheral) and sampling of the signals needed at bootup. It forces the
processor to fetch the next instruction at address zero.
Initialization of the embedded ICE TAP controller.
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High-performance 32-bit Instruction Set
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High Code Density 16-bit Instruction Set
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connected on SPI NPCS0
1790A–ATARM–11/03