AT91RM3400-DK Atmel, AT91RM3400-DK Datasheet - Page 402

• Manufacturer Part Number: AT91RM3400-DK
• Description: KIT DEV FOR AT91RM3400
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91RM3400-DK

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT91RM3400
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• For Use With/related Products: AT91RM3400
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Data IN Transaction
Using Endpoints
Without Ping-pong
Attributes
Figure 165. Data IN Transfer for Non Ping-pong Endpoint
402
USB Bus Packets
TXPKTRDY Flag
(USB_CSRx)
TXCOMP Flag
(USB_CSRx)
FIFO (DPR)
Content
AT91RM3400
Data IN
PID
Prevous Data IN TX
Data IN 1
Interrupt Pending
Data IN transactions are used in control, isochronous, bulk and interrupt transfers and conduct
the transfer of data from the device to the host. Data IN transactions in isochronous transfer
must be done using endpoints with ping-pong attributes.
To perform a Data IN transaction, using a non ping-pong endpoint:
1. The microcontroller checks if it is possible to write in the FIFO by polling TXPKTRDY in
2. The microcontroller writes data to be sent in the endpoint’s FIFO, writing zero or more
3. The microcontroller notifies the USB peripheral it has finished by setting the TXPK-
4. The microcontroller is notified that the endpoint’s FIFO has been released by the USB
TXCOMP is set by the USB device when it has received an ACK PID signal for the Data IN
packet. An interrupt is pending while TXCOMP is set.
Note:
Data IN 1
Cleared by USB Device
the endpoint’s USB_CSRx register (TXPKTRDY must be cleared).
byte values in the endpoint’s USB_FDRx register,
TRDY in the endpoint’s USB_CSRx register,
device when TXCOMP in the endpoint’s USB_CSRx register has been set. Then an
interrupt for the corresponding endpoint is pending while TXCOMP is set.
Refer to Chapter 8 of the Universal Serial Bus Specification, Rev 2.0, for more information on
the Data IN protocol layer.
ACK
PID
Microcontroller Load Data in FIFO
Load In Progress
PID
Data IN
Cleared by Firmware
NAK
PID
Set by the Firmware
Data Payload Written in FIFO
PID
Data IN
Data is Sent on USB Bus
Start to Write Data
Data IN 2
Payload in FIFO
Data IN 2
Load In
Progress
ACK
PID
1790A–ATARM–11/03
Interrupt Pending