AT91RM3400-DK Atmel, AT91RM3400-DK Datasheet - Page 290
AT91RM3400-DK
Manufacturer Part Number
AT91RM3400-DK
Description
KIT DEV FOR AT91RM3400
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91RM3400-DK.pdf
(461 pages)
2.AT91RM3400-DK.pdf
(2 pages)
3.AT91RM3400-DK.pdf
(25 pages)
Specifications of AT91RM3400-DK
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT91RM3400
Data Bus Width
32 bit
Interface Type
RS-232, USB
For Use With/related Products
AT91RM3400
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 290 of 461
- Download datasheet (6Mb)
RS485 Mode
290
AT91RM3400
The USART features the RS485 mode to enable line driver control. While operating in RS485
mode, the USART behaves as though in asynchronous or synchronous mode and configura-
tion of all the parameters are possible. The difference is that the RTS pin is driven high when
the transmitter is operating. The behavior of the RTS pin is controlled by the TXEMPTY bit. A
typical connection of the USART to a RS485 bus is shown in Figure 114.
Figure 114. Typical Connection to a RS485 bus.
The USART is set in RS485 mode by programming the USART_MODE field in the Mode Reg-
ister (US_MR) to the value 0x1.
The RTS pin is at a level inverse of the TXEMPTY bit. Significantly, the RTS pin remains high
when a timeguard is programmed so that the line can remain driven after the last character
completion. Figure 115 gives an example of the RTS waveform during a character transmis-
sion when the timeguard is enabled.
Figure 115. Example of RTS Drive with Timeguard
Baud Rate
TXEMPTY
US_THR
TXRDY
Clock
Write
TXD
RTS
USART
Start
Bit
D0
RXD
TXD
RTS
D1
D2
D3
D4
D5
D6
D7
Parity
Bit
Stop
Bit
Differential
Bus
TG = 4
1790A–ATARM–11/03
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