AT91RM3400-DK Atmel, AT91RM3400-DK Datasheet - Page 238

KIT DEV FOR AT91RM3400

AT91RM3400-DK

Manufacturer Part Number
AT91RM3400-DK
Description
KIT DEV FOR AT91RM3400
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets

Specifications of AT91RM3400-DK

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT91RM3400
Data Bus Width
32 bit
Interface Type
RS-232, USB
For Use With/related Products
AT91RM3400
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Transfer
Figure 77. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)
238
SPCK cycle (for reference)
NSS (to slave)
(from master)
(from slave)
(CPOL=0)
(CPOL=1)
AT91RM3400
Mode 1
Mode 3
SPCK
SPCK
MOSI
MISO
* Not defined, but normally MSB of previous character received.
Four modes are used for data transfers. These modes correspond to combinations of a pair of
parameters called clock polarity (CPOL) and clock phase (NCPHA) that determine the edges
of the clock signal on which the data are driven and sampled. Each of the two parameters has
two possible states, resulting in four possible combinations that are incompatible with one
another. Thus a master/slave pair must use the same parameter pair values to communicate.
If multiple slaves are used and fixed in different configurations, the master must reconfigure
itself each time it needs to communicate with a different slave.
Table 39 shows the four modes and corresponding parameter settings.
Table 39. SPI Bus Protocol Mode
Figure 77 and Figure 78 show examples of data transfers.
MSB
1
MSB
2
6
6
SPI Mode
0
1
2
3
3
5
5
4
4
4
5
3
3
6
6
CPOL
2
2
0
0
1
1
7
1
1
8
LSB
LSB
NCPHA
0
1
0
1
1790A–ATARM–11/03
*

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