C8051F020DK Silicon Laboratories Inc, C8051F020DK Datasheet - Page 132
![DEV KIT FOR F020/F021/F022/F023](/photos/9/23/92314/c8051f020dk_sml.jpg)
C8051F020DK
Manufacturer Part Number
C8051F020DK
Description
DEV KIT FOR F020/F021/F022/F023
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F020DK.pdf
(272 pages)
Specifications of C8051F020DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F020
Silicon Family Name
C8051F02x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F020/021/022/023
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1200
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F020DK
Manufacturer:
SiliconL
Quantity:
10
- Current page: 132 of 272
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C8051F020/1/2/3
132
(Note: Do not use read-modify-write operations on this register.)
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
Bit7
R
-
Reserved.
CNVRSEF: Convert Start Reset Source Enable and Flag
Write:
Read:
C0RSEF: Comparator0 Reset Enable and Flag
Write:
Read:
SWRSF: Software Reset Force and Flag
Write:
Read:
WDTRSF: Watchdog Timer Reset Flag
MCDRSF: Missing Clock Detector Flag
PORSF: Power-On Reset Force and Flag
Write:
Read:
PINRSF: HW Pin Reset Flag
CNVRSEF C0RSEF
R/W
Bit6
1: CNVSTR is a reset source (active low).
0: Source of prior reset was not CNVSTR.
1: Source of prior reset was CNVSTR.
1: Comparator0 is a reset source (active low).
1: Source of prior reset was Comparator0.
0: No Effect.
1: Forces an internal reset. /RST pin is not affected.
0: Prior reset source was not a write to the SWRSF bit.
1: Prior reset source was a write to the SWRSF bit.
0: Source of prior reset was not WDT timeout.
1: Source of prior reset was WDT timeout.
0: Source of prior reset was not Missing Clock Detector timeout.
1: Source of prior reset was Missing Clock Detector timeout.
0: No effect.
1: Forces a Power-On Reset. /RST is driven low.
0: Source of prior reset was not POR.
1: Source of prior reset was POR.
0: Source of prior reset was not /RST pin.
1: Source of prior reset was /RST pin.
0: CNVSTR is not a reset source.
0: Comparator0 is not a reset source.
0: Source of prior reset was not Comparator0.
Figure 13.4. RSTSRC: Reset Source Register
R/W
Bit5
SWRSEF WDTRSF MCDRSF
R/W
Bit4
Rev. 1.4
Bit3
R
Bit2
R
PORSF
R/W
Bit1
PINRSF
Bit0
R
SFR Address:
Reset Value
Variable
0xEF
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