C8051F020DK Silicon Laboratories Inc, C8051F020DK Datasheet - Page 147
C8051F020DK
Manufacturer Part Number
C8051F020DK
Description
DEV KIT FOR F020/F021/F022/F023
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F020DK.pdf
(272 pages)
Specifications of C8051F020DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F020
Silicon Family Name
C8051F02x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F020/021/022/023
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1200
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F020DK
Manufacturer:
SiliconL
Quantity:
10
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Bits7-0:
Bits7-6:
Bit5:
Bit4:
Bits3-2:
Bits1-0:
PGSEL7
R/W
R/W
Bit7
Bit7
-
PGSEL[7:0]: XRAM Page Select Bits.
The XRAM Page Select Bits provide the high byte of the 16-bit external data memory address when
using an 8-bit MOVX command, effectively selecting a 256-byte page of RAM.
0x00: 0x0000 to 0x00FF
0x01: 0x0100 to 0x01FF
...
0xFE: 0xFE00 to 0xFEFF
0xFF: 0xFF00 to 0xFFFF
Unused. Read = 00b. Write = don’t care.
PRTSEL: EMIF Port Select.
0: EMIF active on P0-P3.
1: EMIF active on P4-P7.
EMD2: EMIF Multiplex Mode Select.
0: EMIF operates in multiplexed address/data mode.
1: EMIF operates in non-multiplexed mode (separate address and data pins).
EMD1-0: EMIF Operating Mode Select.
These bits control the operating mode of the External Memory Interface.
00: Internal Only: MOVX accesses on-chip XRAM only. All effective addresses alias to on-chip
memory space.
01: Split Mode without Bank Select: Accesses below the 4k boundary are directed on-chip. Accesses
above the 4k boundary are directed off-chip. 8-bit off-chip MOVX operations use the current contents
of the Address High port latches to resolve upper address byte. Note that in order to access off-chip
space, EMI0CN must be set to a page that is not contained in the on-chip address space.
10: Split Mode with Bank Select: Accesses below the 4k boundary are directed on-chip. Accesses
above the 4k boundary are directed off-chip. 8-bit off-chip MOVX operations use the contents of
EMI0CN to determine the high-byte of the address.
11: External Only: MOVX accesses off-chip XRAM only. On-chip XRAM is not visible to the CPU.
EALE1-0: ALE Pulse-Width Select Bits (only has effect when EMD2 = 0).
00: ALE high and ALE low pulse width = 1 SYSCLK cycle.
01: ALE high and ALE low pulse width = 2 SYSCLK cycles.
10: ALE high and ALE low pulse width = 3 SYSCLK cycles.
11: ALE high and ALE low pulse width = 4 SYSCLK cycles.
PGSEL6
R/W
R/W
Bit6
Bit6
-
Figure 16.1. EMI0CN: External Memory Interface Control
Figure 16.2. EMI0CF: External Memory Configuration
PGSEL5
PRTSEL
R/W
R/W
Bit5
Bit5
PGSEL4
EMD2
R/W
R/W
Bit4
Bit4
PGSEL3
EMD1
R/W
R/W
Bit3
Bit3
Rev. 1.4
PGSEL2
EMD0
R/W
R/W
Bit2
Bit2
PGSEL1
EALE1
C8051F020/1/2/3
R/W
R/W
Bit1
Bit1
PGSEL0
EALE0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
00000000
00000011
Reset Value
Reset Value
0xAF
0xA3
147
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