MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 341
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MPC8536E-ANDROID
Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr
Datasheets
1.MPC8536EBVTAVLA.pdf
(127 pages)
2.MPC8536EBVTAVLA.pdf
(2 pages)
3.MPC8536EBVTAVLA.pdf
(1706 pages)
Specifications of MPC8536E-ANDROID
Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 341 of 1706
- Download datasheet (15Mb)
Freescale Semiconductor
Table 8-55. DDR2 Address Multiplexing for 64-Bit Data Bus with Interleaving and Partial Array Self Refresh
Table 8-56. DDR2 Address Multiplexing for 32-Bit Data Bus with Interleaving and Partial Array Self Refresh
10 x 3
10 x 3
16 x 10
15 x 10
14 x 10
14 x 10
13 x 10
13 x 10
13 x 9
16 x
15 x
x 3
x 3
x 3
x 2
x 3
x 2
x 2
Row
Col
Row
x
Col
MRAS
MCAS
MRAS
MCAS
x
MBA
MBA
MRAS
MCAS
MRAS
MCAS
MRAS
MCAS
MRAS
MCAS
MRAS
MCAS
MRAS
MCAS
MRAS
MCAS
MBA
MBA
MBA
MBA
MBA
MBA
MBA
msb
4
msb
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
4
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34–35
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33–35
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
13 12 11 10 9 8 7 6 5 4 3 2 1 0
13 12 11 10 9 8 7 6 5 4 3 2 1 0
12 11 10 9
12 11 10 9
12 11 10 9
8
7
8
6
7
8
5
6
7
Address from Core Master
Address from Core Master
Disabled
Disabled
4
5
6
3
4
5
2
3
4
1
2
3
0
1
2
2 1 0
2 1 0
2 1 0
2
0
1
2 1 0
2 1 0
1 0
1
1
0
0
0
1
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
9
9
0
9 8 7 6 5 4 3 2 1 0
9 8 7 6 5 4 3 2 1 0
8
8
8
7
7
7
6
6
6
5
5
5
4
4
4
DDR Memory Controller
3
3
3
2
2
2
1
1
1
0
0
0
lsb
lsb
8-67
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