MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 75

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure
Number
18-17
18-18
18-19
19-1
19-2
19-3
19-4
19-5
19-6
19-7
19-8
19-9
19-10
19-11
19-12
19-13
19-14
19-15
19-16
19-17
19-18
19-19
19-20
19-21
19-22
19-23
19-24
19-25
19-26
19-27
19-28
19-29
19-30
19-31
19-32
19-33
20-1
20-2
20-3
20-4
20-5
Freescale Semiconductor
eSPI CSn Mode Register (SPMODEn)............................................................................... 18-12
eSPI Transfer Format with SPMODEx[CPx] = 0 ............................................................... 18-13
eSPI Transfer Format with SPMODEx[CPx] = 1 ............................................................... 18-14
SATA Block Diagram ........................................................................................................... 19-2
Command Queue Register (CQR) ........................................................................................ 19-6
Command Active Register (CAR) ........................................................................................ 19-6
Command Completed Register (CCR) ................................................................................. 19-7
Command Error Register (CER)........................................................................................... 19-7
Device Error Register (DER) ................................................................................................ 19-8
Command Header Base Address Register (CHBA) ............................................................. 19-8
Host Status Register (HStatus).............................................................................................. 19-9
Host Control (HControl) Register....................................................................................... 19-12
Port Number Queue Register (CQPMP) ............................................................................. 19-13
Signature Register (SIG) ..................................................................................................... 19-14
Interrupt Coalescing Control Register (ICC) ...................................................................... 19-14
SATA Interface Status Register (SStatus) ........................................................................... 19-15
SATA Interface Error Register (SError).............................................................................. 19-16
SATA Interface Control Register (SControl) ...................................................................... 19-18
SATA Interface Notification Register (SNotification) ........................................................ 19-20
Transport Layer Configuration Register (TransCfg)........................................................... 19-20
Transport Layer Status Register (TransStatus).................................................................... 19-21
Link Layer Configuration Register (LinkCfg).................................................................... 19-21
Link Layer Configuration Register1 (LinkCfg1)................................................................ 19-22
Link Layer Configuration Register1 (LinkCfg1)................................................................ 19-23
Link Layer Status Register (LinkStatus)............................................................................. 19-23
Link Layer Status Register1 (LinkStatus1)......................................................................... 19-24
PHY Control Configuration Register1 (PhyCtrlCfg1)........................................................ 19-26
Link Layer Command Status Register (CommandStatus) .................................................. 19-27
System Priority Register (SYSPR) ..................................................................................... 19-28
Command Header ............................................................................................................... 19-29
Command Descriptor .......................................................................................................... 19-31
Register Host-to-Device...................................................................................................... 19-32
Register Host-to-Device First Party DMA Commands NCQ ............................................. 19-32
Register Device-to-Host...................................................................................................... 19-32
PRD Entry ........................................................................................................................... 19-43
System Connection of the eSDHC........................................................................................ 20-1
eSDHC Block Diagram......................................................................................................... 20-2
DMA System Address Register (DSADDR) ........................................................................ 20-6
Block Attributes Register (BLKATTR) ................................................................................ 20-6
Command Argument Register (CMDARG) ......................................................................... 20-7
Vendor-Specific BIST Operation ....................................................................................... 19-35
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figures
Title
Number
Page
lxxv