MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 701

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13.4.3
The FCM provides a glueless interface to parallel-bus NAND Flash EEPROM devices. The FCM contains
three basic configuration register groups—BRn, ORn, and FMR.
Figure 13-46
in FCM mode. Commands, address bytes, and data are all transferred on LAD[0:7]
for transfers written to the device, or LFRE asserted for transfers read from the device. eLBC signals
LFCLE and LFALE determine whether writes are of type command (only LFCLE asserted), address (only
LFALE asserted), or write data (neither LFCLE nor LFALE asserted). The NAND Flash RDY/BSY pin is
normally open-drain, and should be pulled high by a 4.7-K resistor. On system reset, a global (boot)
chip-select is available that provides a boot ROM chip-select (LCS0) prior to the system being fully
configured.
1. Note bit numbering reversal: LAD[0] (msb) connects to Flash IO[7], while LAD[7] (lsb) connects to IO[0].
Freescale Semiconductor
Flash Control Machine (FCM)
shows a simple connection between an 8-bit port size NAND Flash EEPROM and the eLBC
Table 13-34. Boot Bank Field Values after Reset for GPCM as Boot Controller
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Register
OR0
BR0
BCTLD
DECC
MSEL
ATOM
CSNT
XACS
EHTR
TRLX
SETA
Field
ACS
SCY
EAD
WP
AM
PS
BA
V
0000_0000_0000_0000_0
0000_0000_0000_0000_0
From cfg_rom_loc
Setting
1111
000
00
00
11
0
1
0
1
1
0
1
1
1
Enhanced Local Bus Controller
1
, with LFWE asserted
13-59

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