MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 421

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 9-48
9.3.8.5
Each core is assigned an EOI register, shown in
for the highest-priority interrupt (routed to int) currently in service. It also updates the corresponding ISRn
by retiring the highest priority interrupt. Data values written to EOI are ignored, and zero is assumed.
Table 9-49
Freescale Semiconductor
Offset IACK0: 0x00A0; IACK1
Offset EOI0: 0x00B0; EOI1
Reset
Reset
16–31 VECTOR Interrupt vector. Vector of the highest pending interrupt (read only)
0–15
W
Bits
W
R
R
28–31 EOI CODE 0000 (write only)
1
1
0–27
Bits
0
0
Reserved in single-processor implementations.
Reserved in single-processor implementations.
describes the IACKn fields.
describes the EOIn fields.
Name
—
Processor Core End of Interrupt Registers (EOI0–EOI1)
EOI has meaning only for interrupts routed to int and should not be accessed
for interrupts routed to cint or IRQ_OUT.
Name
—
Figure 9-48. Processor Core Interrupt Acknowledge Registers (IACK n )
Reserved, should be cleared.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Reserved, should be cleared.
1
: 0x10B0; Per-CPU offset: 0x00B0
1
: 0x10A0; Per-CPU offset: 0x00A0
Figure 9-49. End of Interrupt Registers (EOI n )
—
Table 9-48. IACK n Field Descriptions
Table 9-49. EOI n Field Descriptions
Figure
—
NOTE
All zeros
All zeros
15 16
9-49. Writing to EOI signals the end of processing
Description
Description
Programmable Interrupt Controller (PIC)
VECTOR
Access: Write Only
Access: Read only
27 28
EOI CODE
9-51
31
31