ST72C334J4T6 STMicroelectronics, ST72C334J4T6 Datasheet - Page 114

• Manufacturer Part Number: ST72C334J4T6
• Description: MCU 8BIT FLASH SPI SCI 44TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C334J4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ST72C3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7C334-INDART, ST7MDT2-EPB2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4838

ST72334J/N, ST72314J/N, ST72124J
SUPPLY CURRENT CHARACTERISTICS (Cont’d)
16.4.2 WAIT and SLOW WAIT Modes
Figure 65. Typical I
Notes:
1. Typical data are based on T
2. Data based on characterization results, tested in production at V
3. All I/O pins in input mode with a static value at V
driven by external square wave, CSS and LVD disabled.
4. SLOW-WAIT mode selected with f
V
disabled.
114/153
Symbol
DD
I
DD
or V
IDD [mA]
2.5
1.5
0.5
3
2
0
1
SS
Supply current in WAIT mode
(see
Supply current in SLOW WAIT mode
(see
Supply current in WAIT mode
(see
Supply current in SLOW WAIT mode
(see
3.2
(no load), all peripherals in reset state; clock input (OSC1) driven by external square wave, CSS and LVD
Figure
Figure
Figure
Figure
3.5
65)
66)
65)
66)
DD
Parameter
8MHz
4MHz
in WAIT vs. f
4
VDD [V]
A
=25°C, V
4.5
2MHz
1MHz
CPU
3)
3)
DD
based on f
5
CPU
=5V (4.5V V
4)
4)
5.5
DD
OSC
or V
DD
divided by 32. All I/O pins in input mode with a static value at
SS
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
5.5V range) and V
(no load), all peripherals in reset state; clock input (OSC1)
Figure 66. Typical I
=2MHz, f
=4MHz, f
=8MHz, f
=16MHz, f
=2MHz, f
=4MHz, f
=8MHz, f
=16MHz, f
=2MHz, f
=4MHz, f
=8MHz, f
=16MHz, f
=2MHz, f
=4MHz, f
=8MHz, f
=16MHz, f
Conditions
DD
IDD [mA]
0.35
0.25
0.15
0.05
0.3
0.2
0.1
max. and f
0
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
3.2
=1MHz
=2MHz
=4MHz
=62.5kHz
=125kHz
=250kHz
=1MHz
=2MHz
=4MHz
=62.5kHz
=125kHz
=250kHz
=8MHz
=500kHz
=8MHz
=500kHz
DD
CPU
=3.4V (3.2V V
3.5
max.
DD
500kHz
250kHz
in SLOW-WAIT vs. f
4
VDD [V]
Typ
0.35
0.05
150
300
500
120
0.7
1.3
2.5
0.1
0.2
0.5
45
40
80
6
DD
4.5
1)
3.6V range).
125kHz
62.5kHz
Max
1000
100
300
600
100
160
250
0.6
1.2
2.1
4.0
0.1
0.2
0.4
1.0
20
5
2)
5.5
Unit
mA
CPU
µA