ST72C334J4T6 STMicroelectronics, ST72C334J4T6 Datasheet - Page 34

• Manufacturer Part Number: ST72C334J4T6
• Description: MCU 8BIT FLASH SPI SCI 44TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C334J4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ST72C3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7C334-INDART, ST7MDT2-EPB2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4838

ST72334J/N, ST72314J/N, ST72124J
INTERRUPTS (Cont’d)
Figure 18. Interrupt Processing Flowchart
Table 5. Interrupt mapping
Note 1. Valid for HALT and ACTIVE-HALT modes except for the MCC/RTC or CSS interrupt source which exits from
ACTIVE-HALT mode only.
34/153
N°
10
11
12
13
0
1
2
3
4
5
6
7
8
9
FROM RESET
Data-EEPROM Data EEPROM Interrupt
MCC/RTC
TIMER A
TIMER B
Source
RESET
Block
TRAP
CSS
SCI
SPI
ei0
ei1
ei2
ei3
Reset
Software Interrupt
Not used
Main Clock Controller Time Base Interrupt
or Clock Security System Interrupt
External Interrupt Port A3..0
External Interrupt Port F2..0
External Interrupt Port B3..0
External Interrupt Port B7..4
Not used
SPI Peripheral Interrupts
TIMER A Peripheral Interrupts
TIMER B Peripheral Interrupts
SCI Peripheral Interrupts
Not used
EXECUTE INSTRUCTION
Description
RESTORE PC, X, A, CC FROM STACK
THIS CLEARS I BIT BY DEFAULT
FETCH NEXT INSTRUCTION
N
I BIT SET?
IRET?
Y
Y
Register
MCCSR
EECSR
SPISR
SCISR
CRSR
Label
TASR
TBSR
N/A
N/A
N
LOAD PC FROM INTERRUPT VECTOR
Priority
Highest
Lowest
Priority
Priority
Order
N
STACK PC, X, A, CC
INTERRUPT
PENDING?
SET I BIT
HALT
from
Exit
yes
yes
no
no
Y
1)
FFECh-FFEDh
FFFCh-FFFDh
FFEEh-FFEFh
FFEAh-FFEBh
FFFEh-FFFFh
FFFAh-FFFBh
FFE8h-FFE9h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
FFE6h-FFE7h
Address
Vector