ST72C334J4T6 STMicroelectronics, ST72C334J4T6 Datasheet - Page 139

MCU 8BIT FLASH SPI SCI 44TQFP

ST72C334J4T6

Manufacturer Part Number
ST72C334J4T6
Description
MCU 8BIT FLASH SPI SCI 44TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72C334J4T6

Core Processor
ST7
Core Size
8-Bit
Speed
16MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3.2 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ST72C3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
3.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7C334-INDART, ST7MDT2-EPB2/US
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4838

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Part Number
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Price
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8-BIT ADC CHARACTERISTICS (Cont’d)
ADC Accuracy
Figure 99. ADC Accuracy Characteristics
Notes:
1. ADC Accuracy vs. Negative Injection Current:
For I
for each 10K
under worst-case conditions for injection:
- negative injection
- injection to an Input with analog capability, adjacent to the enabled Analog Input
- at 5V V
2. Data based on characterization results with T
3. Data based on characterization results over the whole temperature range.
Symbol
255
254
253
|E
|E
|E
E
E
7
6
5
4
3
2
1
INJ-
O
G
D
T
L
0
V
|
|
|
SSA
=0.8mA, the typical leakage induced inside the die is 1.6µA and the effect on the ADC accuracy is a loss of 1 LSB
Digital Result ADCDR
DD
Total unadjusted error
Offset error
Gain Error
Differential linearity error
Integral linearity error
1
1LSB
supply, and worst case temperature.
E
O
increase of the external analog source impedance. This effect on the ADC accuracy has been observed
2
IDEAL
3
1)
1)
=
Parameter
4
V
---------------------------------------- -
DDA
5
256
1 LSB
1)
1)
V
E
SSA
6
1)
T
IDEAL
E
7
L
(2)
E
A
D
=25°C.
253 254 255 256
(3)
V
f
CPU
Typ.
DD
=5V,
=1MHz
(1)
E
2)
G
Max
V
2.0
1.5
1.5
1.5
1.5
DDA
ST72334J/N, ST72314J/N, ST72124J
f
V
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
CPU
Typ.
T
O
G
D
L
DD
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Differential Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
V
in
=5.0V,
=8MHz
(LSB
IDEAL
Max
3)
2.0
1.5
1.5
1.5
1.5
)
V
f
CPU
DD
Typ
=3.3V,
=8MHz
Max
3)
2.0
1.5
1.5
1.5
1.5
139/153
Unit
LSB

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