ST72C334J4T6 STMicroelectronics, ST72C334J4T6 Datasheet - Page 96

MCU 8BIT FLASH SPI SCI 44TQFP

ST72C334J4T6

Manufacturer Part Number
ST72C334J4T6
Description
MCU 8BIT FLASH SPI SCI 44TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72C334J4T6

Core Processor
ST7
Core Size
8-Bit
Speed
16MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3.2 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ST72C3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
3.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7C334-INDART, ST7MDT2-EPB2/US
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4838

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ST72334J/N, ST72314J/N, ST72124J
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
EXTENDED RECEIVE PRESCALER DIVISION
REGISTER (ERPR)
Read/Write
Reset Value: 0000 0000 (00 h)
Allows setting of the Extended Prescaler rate divi-
sion factor for the receive circuit.
Bit 7:1 = ERPR[7:0] 8-bit Extended Receive Pres-
caler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see Figure 3.) is divided by the
binary factor set in the ERPR register (in the range
1 to 255).
The extended baud rate generator is not used af-
ter a reset.
Table 18. SCI Register Map and Reset Values
96/153
ERPR
Address
(Hex.)
7
7
0050h
0051h
0052h
0053h
0054h
0055h
0057h
ERPR
6
SCISR
Reset Value
SCIDR
Reset Value
SCIBRR
Reset Value
SCICR1
Reset Value
SCICR2
Reset Value
SCIPBRR
Reset Value
SCIPBRT
Reset Value
Register
ERPR
Label
5
ERPR
4
TDRE
ERPR
MSB
SOG
MSB
MSB
TIE
R8
7
3
1
x
0
x
0
0
0
ERPR
2
TCIE
TC
T8
6
0
1
x
0
x
0
0
ERPR
1
ERPR
RDRF
VPOL
0
0
RIE
5
0
x
x
0
0
0
0
EXTENDED TRANSMIT PRESCALER DIVISION
REGISTER (ETPR)
Read/Write
Reset Value:0000 0000 (00h)
Allows setting of the External Prescaler rate divi-
sion factor for the transmit circuit.
Bit 7:1 = ETPR[7:0] 8-bit Extended Transmit Pres-
caler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see Figure 3.) is divided by the
binary factor set in the ETPR register (in the range
1 to 255).
The extended baud rate generator is not used af-
ter a reset.
2FHDET
ETPR
IDLE
ILIE
7
7
M
4
0
x
x
x
0
0
0
ETPR
6
HVSEL
WAKE
OR
TE
ETPR
3
0
0
0
0
x
x
x
5
ETPR
VCORDIS
4
RE
NF
2
0
0
0
0
0
x
x
ETPR
3
CLPINV
RWU
ETPR
FE
1
0
x
x
0
0
0
0
2
ETPR
1
BLKINV
SBK
LSB
LSB
LSB
0
0
0
0
0
0
x
x
ETPR
0
0

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