ST72C334J4T6 STMicroelectronics, ST72C334J4T6 Datasheet - Page 126

• Manufacturer Part Number: ST72C334J4T6
• Description: MCU 8BIT FLASH SPI SCI 44TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C334J4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ST72C3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7C334-INDART, ST7MDT2-EPB2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4838

ST72334J/N, ST72314J/N, ST72124J
EMC CHARACTERISTICS (Cont’d)
16.7.3 ESD Pin Protection Strategy
To protect an integrated circuit against Electro-
Static Discharge the stress must be controlled to
prevent degradation or destruction of the circuit el-
ements. The stress generally affects the circuit el-
ements which are connected to the pads but can
also affect the internal devices when the supply
pads receive the stress. The elements to be pro-
tected must not receive excessive current, voltage
or heating within their structure.
An ESD network combines the different input and
output ESD protections. This network works, by al-
lowing safe discharge paths for the pins subjected
to ESD stress. Two critical ESD stress cases are
presented in
pins and in
drain pins.
Figure 77. Positive Stress on a Standard Pad vs. V
Figure 78. Negative Stress on a Standard Pad vs. V
126/153
Main path
Path to avoid
Main path
Figure 79
Figure 77
V
V
V
V
DD
DD
SS
SS
and
and
Figure 80
Figure 78
(3a)
(3b)
(3a)
(3b)
for true open
for standard
OUT
OUT
SS
Standard Pin Protection
To protect the output structure the following ele-
ments are added:
To protect the input structure the following ele-
ments are added:
DD
– A diode to V
– A protection device between V
– A resistor in series with the pad (1)
– A diode to V
– A protection device between V
(4)
(4)
IN
IN
DD
DD
(3a) and a diode from V
(2a) and a diode from V
(2a)
(2b)
(2a)
(2b)
(1)
(1)
DD
DD
and V
and V
SS
SS
SS
SS
V
V
V
V
DD
SS
DD
SS
(3b)
(2b)
(4)
(4)