ST72C334J4T6 STMicroelectronics, ST72C334J4T6 Datasheet - Page 116

• Manufacturer Part Number: ST72C334J4T6
• Description: MCU 8BIT FLASH SPI SCI 44TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C334J4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ST72C3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7C334-INDART, ST7MDT2-EPB2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4838

ST72334J/N, ST72314J/N, ST72124J
16.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for V
16.5.1 General Timings
16.5.2 External Clock Source
Figure 67. Typical Application with an External Clock Source
Notes:
1. Data based on typical application software.
2. Time measured between interrupt event and interrupt vector fetch. t
the current instruction execution.
3. Data based on design simulation and/or technology characteristics, not tested in production.
116/153
t
t
Symbol
Symbol
w(OSC1H)
V
w(OSC1L)
V
t
t
t
r(OSC1)
f(OSC1)
c(INST)
OSC1H
t
OSC1L
v(IT)
I
L
V
V
Instruction cycle time
Interrupt reaction time
t
OSC1 input pin high level voltage
OSC1 input pin low level voltage
OSC1 high or low time
OSC1 rise or fall time
OSCx Input leakage current
OSC1H
OSC1L
v(IT)
EXTERNAL
CLOCK SOURCE
= t
c(INST)
Parameter
Parameter
+ 10
t
r(OSC1)
3)
2)
3)
t
f(OSC1)
OSC2
OSC1
90%
f
f
see
V
DD
CPU
CPU
SS
10%
, f
Figure 67
=8MHz
=8MHz
V
OSC
IN
Conditions
Conditions
, and T
V
DD
t
Not connected internally
w(OSC1H)
A
.
c(INST)
I
is the number of t
L
t
w(OSC1L)
1.25
0.7xV
Min
250
10
2
Min
V
15
SS
f
DD
OSC
Typ
ST72XXX
375
Typ
3
CPU
1)
cycles needed to finish
0.3xV
1500
Max
2.75
Max
12
22
V
15
±1
DD
DD
Unit
Unit
t
t
CPU
CPU
ns
ns
V
s
A