ST72C334J4T6 STMicroelectronics, ST72C334J4T6 Datasheet - Page 46

• Manufacturer Part Number: ST72C334J4T6
• Description: MCU 8BIT FLASH SPI SCI 44TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C334J4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ST72C3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7C334-INDART, ST7MDT2-EPB2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4838

ST72334J/N, ST72314J/N, ST72124J
13 MISCELLANEOUS REGISTERS
The miscellaneous registers allow control over
several different features such as the external in-
terrupts or the I/O alternate functions.
13.1 I/O PORT INTERRUPT SENSITIVITY
The external interrupt sensitivity is controlled by
the ISxx bits of the MISCR1 miscellaneous regis-
ter. This control allows to have two fully independ-
ent external interrupt source sensitivities.
Each external interrupt source can be generated
on four different events on the pin:
To guarantee correct functionality, the sensitivity
bits in the MISCR1 register must be modified only
when the I bit of the CC register is set to 1 (inter-
rupt masked). See I/O port register and Miscella-
neous register descriptions for more details on the
programming.
13.2 I/O PORT ALTERNATE FUNCTIONS
The MISCR registers manage four I/O port miscel-
laneous alternate functions:
These functions are described in detail in the
tion 13 "MISCELLANEOUS REGISTERS" on
page
46/153
– SS pin internal control to use the PC7 I/O port
Falling edge
Rising edge
Falling and rising edge
Falling edge and low level
Main clock signal (f
A beep signal output on PF1 (with 3 selectable
audio frequencies)
SPI pin configuration:
function while the SPI is active.
46.
CPU
) output on PF0
Sec-
Figure 28. Ext. Interrupt Sensitivity
PB0
PB3
PB1
PB2
PB4
PB7
PA0
PA3
PB5
PB6
PA1
PA2
PF0
PF1
PF2
INTERRUPT
INTERRUPT
SOURCE
SOURCE
ei2
ei3
ei0
ei1
SENSITIVITY
SENSITIVITY
IS10
IS20
CONTROL
CONTROL
MISCR1
MISCR1
IS11
IS21