TMP86FH46ANG(Z) Toshiba, TMP86FH46ANG(Z) Datasheet - Page 142

IC MCU 8BIT FLASH 16KB 42-SDIP

TMP86FH46ANG(Z)

Manufacturer Part Number
TMP86FH46ANG(Z)
Description
IC MCU 8BIT FLASH 16KB 42-SDIP
Manufacturer
Toshiba
Series
TLCS-870/Cr
Datasheet

Specifications of TMP86FH46ANG(Z)

Core Processor
870/C
Core Size
8-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LED, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SDIP (0.600", 15.24mm)
Processor Series
TLCS-870
Core
870/C
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SIO, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
BMSKTOPAS86FH47(AND), BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP86C909XB - EMULATION CHIP FOR TMP86F SDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
TMP86FH46ANGZ
11.9 Status Flag
11.9.4 Receive Data Buffer Full
11.9.5 Transmit Data Buffer Empty
RXD pin
RDBUF
UARTSR<RBFL>
INTRXD interrupt
Shift register
UARTSR<RBFL> is cleared to “0” when the RDBUF is read after reading the UARTSR.
are transferred to the transmit shift register and data transmit starts, transmit data buffer empty flag
UARTSR<TBEP> is set to “1”. The UARTSR<TBEP> is cleared to “0” when the TDBUF is written after
reading the UARTSR.
UARTSR<RBFL>
RXD pin
RDBUF
UARTSR<OERR>
INTRXD interrupt
Shift register
Note:Receive operations are disabled until the overrun error flag UARTSR<OERR> is cleared.
Loading the received data in RDBUF sets receive data buffer full flag UARTSR<RBFL> to "1". The
Note:If the overrun error flag UARTSR<OERR> is set during the period between reading the UARTSR and reading
When no data is in the transmit buffer TDBUF, UARTSR<TBEP> is set to “1”, that is, when data in TDBUF
the RDBUF, it cannot be cleared by only reading the RDBUF. Therefore, after reading the RDBUF, read the
UARTSR again to check whether or not the overrun error flag which should have been cleared still remains
set.
Figure 11-8 Generation of Receive Data Buffer Full
Figure 11-7 Generation of Overrun Error
xxx0 **
yyyy
xxx0 **
yyyy
Final bit
Final bit
Page 128
xxxx0
xxxx0
*
*
Stop
Stop
1xxxx0
xxxx
1xxxx0
After reading UARTSR then
RDBUF clears RBFL.
After reading UARTSR then
RDBUF clears OERR.
TMP86FH46ANG

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