TMP86FH46ANG(Z) Toshiba, TMP86FH46ANG(Z) Datasheet - Page 41

• Manufacturer Part Number: TMP86FH46ANG(Z)
• Description: IC MCU 8BIT FLASH 16KB 42-SDIP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FH46ANG(Z)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: BMSKTOPAS86FH47(AND), BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP86C909XB - EMULATION CHIP FOR TMP86F SDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FH46ANGZ

Example :Switching from the SLOW1 mode to the NORMAL2 mode (fc = 16 MHz, warm-up time is 4.0 ms).
PINTTC4:
VINTTC4:
(2)
First, set SYSCR2<XEN> to turn on the high-frequency oscillation. When time for stabilization
(Warm up) has been taken by the timer/counter (TC4,TC3), clear SYSCR2<SYSCK> to switch the
main system clock to the high-frequency clock.
SLOW mode can also be released by inputting low level on the
operation mode is started from NORMAL1 mode.
Switching from SLOW1 mode to NORMAL2 mode
Note: After SYSCK is cleared to “0”, executing the instructions is continiued by the low-frequency clock
SET
LD
LD
LD
DI
SET
EI
SET
CLR
CLR
RETI
DW
:
:
for the period synchronized with low-frequency and high-frequency clocks.
High-frequency clock
Low-frequency clock
Main system clock
SYSCK
(SYSCR2). 7
(TC3CR), 63H
(TC4CR), 05H
(TTREG4), 0F8H
(EIRH). 1
(TC4CR). 3
(TC4CR). 3
(SYSCR2). 5
PINTTC4
Page 27
; SYSCR2<XEN>
; Sets mode for TC4, 3 (16-bit mode, fc for source)
; Sets warming-up counter mode
; Sets warm-up time
; IMF
; Enables INTTC4
; IMF
; Starts TC4, 3
; Stops TC4, 3
; SYSCR2<SYSCK>
; INTTC4 vector table
(Switches the main system clock to the high-frequency clock)
←
←
0
1
←
←
1 (Starts high-frequency oscillation)
0
RESET
pin. After releasing reset, the
TMP86FH46ANG