TMP86FH46ANG(Z) Toshiba, TMP86FH46ANG(Z) Datasheet - Page 54

• Manufacturer Part Number: TMP86FH46ANG(Z)
• Description: IC MCU 8BIT FLASH 16KB 42-SDIP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FH46ANG(Z)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: BMSKTOPAS86FH47(AND), BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP86C909XB - EMULATION CHIP FOR TMP86F SDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FH46ANGZ

3.4 Interrupt Sequence
Example 1 :Returning from address trap interrupt (INTATRAP) service program
Example 2 :Restarting without returning interrupt
3.4.3 Interrupt return
Figure 3-4 Saving/Restoring General-purpose Registers under Interrupt Processing
(In this case, PSW (Includes IMF) before interrupt acceptance is discarded.)
restarting address, during interrupt service program.
rupt can be accepted immediately after the interrupt return instruction is executed.
Interrupt return instructions [RETI]/[RETN] perform as follows.
As for address trap interrupt (INTATRAP), it is required to alter stacked data for program counter (PC) to
Note:If [RETN] is executed with the above data unaltered, the program returns to the address trap area and
Interrupt requests are sampled during the final cycle of the instruction being executed. Thus, the next inter-
PINTxx:
PINTxx:
INTATRAP occurs again.When interrupt acceptance processing has completed, stacked data for PCL and
PCH are located on address (SP + 1) and (SP + 2) respectively.
Saving/Restoring general-purpose registers using PUSH/POP data transfer instruction
POP
LD
PUSH
(interrupt processing)
RETN
INC
INC
INC
(interrupt processing)
LD
JP
Main task
1. Program counter (PC) and program status word
2. Stack pointer (SP) is incremented by 3.
(PSW, includes IMF) are restored from the stack.
WA
WA, Return Address
WA
SP
SP
SP
EIRL, data
Restart Address
Interrupt
acceptance
[RETI]/[RETN] Interrupt Return
Interrupt return
Page 40
Interrupt
service task
; Alter stacked data
;
;
; Set IMF to “1” or clear it to “0”
; Jump into restarting address
; Recover SP by 2
;
; RETURN
; Recover SP by 3
Saving
registers
Restoring
registers
TMP86FH46ANG