TMP86FH46ANG(Z) Toshiba, TMP86FH46ANG(Z) Datasheet - Page 63

• Manufacturer Part Number: TMP86FH46ANG(Z)
• Description: IC MCU 8BIT FLASH 16KB 42-SDIP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FH46ANG(Z)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: BMSKTOPAS86FH47(AND), BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP86C909XB - EMULATION CHIP FOR TMP86F SDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FH46ANGZ

5. Time Base Timer (TBT)
5.1 Time Base Timer
Time Base Timer Control Register
5.1.1 Configuration
5.1.2 Control
timer interrupt (INTTBT).
(0036H)
TBTCR
The time base timer generates time base for key scanning, dynamic displaying, etc. It also provides a time base
Note 1: fc; High-frequency clock [Hz], fs; Low-frequency clock [Hz], *; Don't care
TBTEN
TBTCK
Time Base Timer is controled by Time Base Timer control register (TBTCR).
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
23
21
16
14
13
12
11
(DVOEN)
or fs/2
or fs/2
9
or fs/2
or fs/2
or fs/2
or fs/2
or fs/2
or fs/2
7
Time Base Timer
enable / disable
Time Base Timer interrupt
Frequency select : [Hz]
15
13
8
6
5
4
3
TBTCK
Time base timer control register
6
(DVOCK)
Figure 5-1 Time Base Timer configuration
MPX
3
TBTCR
5
Source clock
(DV7CK)
4
0: Disable
1: Enable
TBTEN
000
001
010
011
100
101
110
111
TBTEN
Falling edge
Page 49
3
detector
DV7CK = 0
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
NORMAL1/2, IDLE1/2 Mode
fc/2
2
23
21
16
14
13
12
11
9
TBTCK
1
DV7CK = 1
fs/2
fs/2
fs/2
fs/2
fs/2
fs/2
fs/2
fs/2
0
15
13
8
6
5
4
3
(Initial Value: 0000 0000)
release request
INTTBT
interrupt request
IDLE0, SLEEP0
SLEEP1/2
SLOW1/2
TMP86FH46ANG
Mode
fs/2
fs/2
–
–
–
–
–
–
15
13
R/W