R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 104

• Manufacturer Part Number: R5F21324CNSP#U0
• Description: MCU 1KB FLASH 16K ROM 20-LSSOP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/32Cr

Specifications of R5F21324CNSP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 15
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-LSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 75 of 573
7.4.16
Note:
7.4.17
Note:
After Reset
1. Both “H” and “L” output are set to high drive capacity.
DRR06 Bit (P3_3 drive capacity)
DRR07 Bit (P3_4, P3_5, P3_7 drive capacity)
After Reset
1. Both “H” and “L” output are set to high drive capacity.
DRR11 Bit (P4_5 to P4_7 drive capacity)
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 01F2h
Address 01F3h
For pins used as output, the setting values in the DRR0 register are valid.
The DRR06 bit selects whether the drive capacity of the P3_3 output transistors is set to low or high. This bit is
used to select whether the drive capacity of the output transistors is set to low or high for this pin.
The DRR07 bit selects whether the drive capacity of the P3_4, P3_5, P3_7 output transistors is set to low or
high. This bit is used to select whether the drive capacity of the output transistors is set to low or high for three
pins.
For pins used as output, the setting values in the DRR1 register are valid.
The DRR11 bit selects whether the drive capacity of the P4_5 to P4_7 output transistors is set to low or high.
This bit is used to select whether the drive capacity of the output transistors is set to low or high for four pins.
Symbol
Symbol
Symbol
Symbol
DRR06 P3_3 drive capacity
DRR07 P3_4, P3_5, P3_7 drive capacity
DRR11 P4_5 to P4_7 drive capacity
Bit
Bit
Drive Capacity Control Register 0 (DRR0)
Drive Capacity Control Register 1 (DRR1)
—
—
—
—
—
—
—
—
—
—
—
—
—
DRR07
b7
b7
—
0
0
Reserved bits
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Reserved bit
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Reserved bits
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
DRR06
b6
b6
—
0
0
Bit Name
Bit Name
b5
—
b5
—
0
0
b4
b4
—
—
0
0
Set to 0.
0: Low
1: High
Set to 0.
0: Low
1: High
Set to 0.
b3
b3
—
—
0
0
(1)
(1)
b2
b2
—
—
0
0
Function
DRR11
Function
b1
b1
—
0
0
b0
b0
—
—
0
0
7. I/O Ports
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—