R5F21324CNSP#U0 Renesas Electronics America, R5F21324CNSP#U0 Datasheet - Page 522

MCU 1KB FLASH 16K ROM 20-LSSOP

R5F21324CNSP#U0

Manufacturer Part Number
R5F21324CNSP#U0
Description
MCU 1KB FLASH 16K ROM 20-LSSOP
Manufacturer
Renesas Electronics America
Series
R8C/3x/32Cr
Datasheet

Specifications of R5F21324CNSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-LSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/32C Group
REJ09B0573-0100 Rev.1.00 Dec. 18, 2009
Page 493 of 573
Figure 29.8
29.4.11.3 Program Command
The program command is used to write data to the flash memory in 1-byte units.
When 40h is written in the first bus cycle and data is written in the second bus cycle to the write address, auto-
programming (data program and verify operation) starts. Make sure the address value specified in the first bus
cycle is the same address as the write address specified in the second bus cycle.
The FST7 bit in the FST register can be used to confirm whether auto-programming has completed. The FST7
bit is set to 0 during auto-programming and is set to 1 when auto-programming completes.
After auto-programming has completed, the auto-program result can be confirmed by the FST4 bit in the FST
register (refer to 29.4.12 Full Status Check).
Do not write additions to the already programmed addresses.
The program command targeting each block in the program ROM can be disabled using the lock bit.
The following commands are not accepted under the following conditions:
Figure 29.8 shows a Program Flowchart (Flash Ready Status Interrupt Disabled) and Figure 29.9 shows a
Program Flowchart (Flash Ready Status Interrupt Enabled).
In EW1 mode, do not execute this command to any address where a rewrite control program is allocated.
When the RDYSTIE bit in the FMR0 register is set to 1 (flash ready status interrupt enabled), a flash ready
status interrupt can be generated upon completion of auto-programming. The auto-program result can be
confirmed by reading the FST register during the interrupt routine.
Block erase commands targeting data flash block A when the FMR14 bit in the FMR1 register is set to 1
(rewrite disabled).
Block erase commands targeting data flash block B when the FMR15 bit is set to 1 (rewrite disabled).
Block erase commands targeting data flash block C when the FMR16 bit is set to 1 (rewrite disabled).
Block erase commands targeting data flash block D when the FMR17 bit is set to 1 (rewrite disabled).
Program Flowchart (Flash Ready Status Interrupt Disabled)
Write the command code 40h
Write data to the write address
Program completed
Full status check
FST7 = 1?
Start
Yes
No
FST7: Bit in FST register
29. Flash Memory

Related parts for R5F21324CNSP#U0