R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1082

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

21. Serial Communication Interface with FIFO (SCIF)
Legend:
Pck: Peripheral Clock
Notes: 1. When the PE bit is set to 1, the parity (even or odd) specified by the O/E bit is added to
Rev.1.00 Jan. 10, 2008 Page 1050 of 1658
REJ09B0261-0100
Bit
3
2
1
0
2. In transmission, a single 1-bit (stop bit) is added to the end of a transmit character
3. In transmission, two 1-bits (stop bits) are added to the end of a transmit character
Bit Name
STOP
—
CKS1
CKS0
transmit data before transmission. In reception, the parity bit is checked for the parity
(even or odd) specified by the O/E bit.
before it is sent.
before it is sent.
Initial
Value
0
0
0
0
R/W
R/W
R
R/W
R/W
Description
Stop Bit Length
In asynchronous mode, selects 1 or 2 bits as the stop
bit length. The stop bit setting is valid only in
asynchronous mode. Since the stop bit is not added in
clocked synchronous mode, the STOP bit setting is
invalid.
0: 1 stop bit*
1: 2 stop bits*
In reception, only the first stop bit is checked,
regardless of the STOP bit setting. If the second stop
bit is 1, it is treated as a stop bit. If it is 0, it is treated as
the start bit of the next transmit character.
Reserved
This bit is always read as 0. The write value should
always be 0.
Clock Select 1 and 0
These bits select the clock source for the on-chip baud
rate generator. The clock source can be selected from
Pck, Pck/4, Pck/16, and Pck/64, according to the CKS1
and CKS0 settings.
For details on the relationship among clock sources, bit
rate register settings, and baud rate, see section
21.3.8, Bit Rate Register n (SCBRR).
00: Pck clock
01: Pck/4 clock
10: Pck/16 clock
11: Pck/64 clock
2
3