R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1099

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bit
6
5
4
3
Bit Name
RTSDT*
CTSIO*
CTSDT*
SCKIO
Initial
Value
—
0
—
0
R/W
R/W
R/W
R/W
R/W
Description
Serial Port SCIF_RTS Port Data
Specifies the serial port SCIF_RTS pin input/output
data. Input or output is specified by the RTSIO bit. In
output mode, the RTSDT bit value is output to the
SCIF_RTS pin. The SCIF_RTS pin value is read from
the RTSDT bit regardless of the value of the RTSIO bit.
The initial value of this bit after a power-on reset or
manual reset is undefined.
0: Input/output data is low-level
1: Input/output data is high-level
Serial Port SCIF_CTS Port Input/Output
Specifies the serial port SCIF_CTS pin input/output
condition. When actually setting the SCIF_CTS pin as
a port output pin to output the value set by the CTSDT
bit, the MCE bit in SCFCR should be cleared to 0.
0: CTSDT bit value is not output to SCIF_CTS pin
1: CTSDT bit value is output to SCIF_CTS pin
Serial Port SCIF_CTS Port Data
Specifies the serial port SCIF_CTS pin input/output
data. Input or output is specified by the CTSIO bit. In
output mode, the CTSDT bit value is output to the
SCIF_CTS pin. The SCIF_CTS pin is read from the
CTSDT bit regardless of the value of the CTSIO bit.
The initial value of this bit after a power-on reset or
manual reset is undefined.
0: Input/output data is low-level
1: Input/output data is high-level
Serial Port Clock Port Input/Output
Specifies the serial port SCIF_SCK pin input/output
condition. When actually setting the SCIF_SCK pin as
a port output pin to output the value set by the SCKDT
bit, the CKE1 and CKE0 bits in SCSCR should be
cleared to 0.
0: SCKDT bit value is not output to SCIF_SCK pin
1: SCKDT bit value is output to SCIF_SCK pin
21. Serial Communication Interface with FIFO (SCIF)
Rev.1.00 Jan. 10, 2008 Page 1067 of 1658
REJ09B0261-0100