R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 122

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5. Exception Handling
Table 5.2
5.2.1
The TRAPA exception register (TRA) consists of 8-bit immediate data (imm) for the TRAPA
instruction. TRA is set automatically by hardware when a TRAPA instruction is executed. TRA
can also be modified by software.
Initial value:
Initial value:
Rev.1.00 Jan. 10, 2008 Page 90 of 1658
REJ09B0261-0100
Register Name
TRAPA exception register
Exception event register
Interrupt event register
Non-support detection exception
register
Bit
31 to 10 ⎯
9 to 2
1, 0
R/W:
R/W:
Bit:
Bit:
TRAPA Exception Register (TRA)
Bit Name
TRACODE
⎯
31
15
R
R
0
0
States of Register in Each Operating Mode
30
14
R
R
0
0
29
13
R
R
0
0
Initial Value
All 0
Undefined
All 0
28
12
R
R
0
0
TRA
EXPEVT
Abbr.
INTEVT
EXPMASK H'0000 0013 H'0000 0013
27
11
R
0
R
0
R/W
R
R/W
R
26
10
R
R
0
0
Power-on
Reset
Undefined
H'0000 0000 H'0000 0020
Undefined
R/W
25
R
0
9
Description
Reserved
For details on reading/writing this bit, see General
Precautions on Handling of Product.
TRAPA Code
8-bit immediate data of TRAPA instruction is set
Reserved
For details on reading/writing this bit, see General
Precautions on Handling of Product.
R/W
24
R
0
8
R/W
Manual Reset Sleep
Undefined
Undefined
23
R
0
7
R/W
TRACODE
22
R
0
6
R/W
21
R
0
5
Retained
Retained
Retained
Retained
R/W
20
R
0
4
R/W
19
R
0
3
Standby
Retained
Retained
Retained
Retained
R/W
18
R
0
2
17
R
R
0
1
0
16
R
R
0
0
0