R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1112

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

21. Serial Communication Interface with FIFO (SCIF)
Figure 21.10 shows an example of the operation for transmission in asynchronous mode.
4. When modem control is enabled, transmission can be stopped and restarted in accordance with
Figure 21.11 shows an example of the operation when modem control is used.
Rev.1.00 Jan. 10, 2008 Page 1080 of 1658
REJ09B0261-0100
Idle state
(mark state)
SCIF_TXD
the SCIF_CTS input value. When SCIF_CTS is set to 1 during transmission, the SCIF goes to
the mark state after transmission of one frame. When SCIF_CTS is set to 0, the next transmit
data is output starting from the start bit.
SCIF_TXD
Serial data
SCIF_CTS
Figure 21.11 Example of Operation Using Modem Control (SCIF_CTS)
Serial
data
TDFE
TEND
1
TXI interrupt
request
Figure 21.10 Example of SCIF Transmission Operation
Start
bit
Start
bit
0
0
(Example with 8-Bit Data, Parity, One Stop Bit)
D0
Data written to SCFTDR
and TDFE read as 1 then
cleared to 0 by TXI
interrupt handler
D0
D1
D1
One frame
Data
D7 0/1
(Only in Channel 0)
Drive high before stop bit
D7
Parity
bit
Parity
bit
0/1
Stop
bit
TXI interrupt
request
Stop
bit
1
Start
bit
0
D0
D1
Start
bit
0
Data
D0 D1
D7
Parity
bit
0/1
Stop
bit
D7 0/1
1
Idle state
(mark state)
1