R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1568

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

31. Register List
Rev.1.00 Jan. 10, 2008 Page 1536 of 1658
REJ09B0261-0100
Module
Name
DDR2IF
PCIC
Name
SDRAM timing register 0
SDRAM timing register 1
SDRAM timing register 2
SDRAM refresh control register 0
SDRAM refresh control register 1
SDRAM refresh control register 2
SDRAM refresh status register
DDRPAD frequency setting register
DDRPAD DIC, ODT, OCD setting register
SDRAM mode setting register
Control register space (physical address: H'FE00 0000 to H'FE03 FFFF)
PCIC enable control register
PCI configuration register space (physical address: H'FE04 0000 to H'FE04 00FF)
PCI vendor ID register
PCI device ID register
PCI command register
PCI status register
PCI revision ID register
PCI program interface register
PCI sub class code register
PCI base class code register
PCI cache line size register
PCI latency timer register
PCI header type register
PCI BIST register
PCI I/O base address register
PCI Memory base address register 0
PCI Memory base address register 1
PCI subsystem vendor ID register
PCI subsystem ID register
Abbrev.
DBTR0
DBTR1
DBTR2
DBRFCNT0
DBRFCNT1
DBRFCNT2
DBRFSTS
DBFREQ
DBDICODTOCD
DBMRCNT
PCIECR
PCIVID
PCIDID
PCICMD
PCISTATUS
PCIRID
PCIPIF
PCISUB
PCIBCC
PCICLS
PCILTM
PCIHDR
PCIBIST
PCIIBAR
PCIMBAR0
PCIMBAR1
PCISVID
PCISID
Power-on
Reset by
PRESET Pin/
WDT/H-UDI
H'0203 0501
H'0001 0001
H'0104 0303
H'0000 0000
H'0000 0200
H'1000 0080
H'0000 0000
H'0000 0000
H'0000 0007
Undefined
H'0000 0000
H'1912
H'0007
H'0080
H'0290
H'xx
H'00
H'00
H'xx
H'20
H'00
H'00
H'00
H'0000 0001
H'0000 0000
H'0000 0000
H'0000
H'0000
Manual Reset
by
WDT/Multiple
Exception
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep/
Deep Sleep by
SLEEP
Instruction
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained