R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1320

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ANBGV

Manufacturer Part Number
R8A77850ANBGV
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ANBGV

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ANBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
25. Audio Codec Interface (HAC)
25.5
25.5.1
The HAC receiver receives serial audio data input on the HAC_SDIN pin, synchronous to
HAC_BITCLK. From slot 0, the receiver extracts tag bits that indicate which other slots contain
valid data. It will update the receive data only when receiving valid slot data indicated by the tag
bits.
Supporting data only in slots 1 to 4, the receiver ignores tag bits and data related to slots 5 to 12. It
loads valid slot data to the corresponding shift register to hold the data for PIO or DMA transfer,
and sets the corresponding status bits. It is possible to read 20-bit data within a 32-bit register
using PIO.
In the case of RX overrun, the new data will overwrite the current data in the RX buffer of the
HAC.
25.5.2
The HAC transmitter outputs serial audio data on the HAC_SDOUT pin, synchronous to
HAC_BIT_CLK. The transmitter sets the tag bits in slot 0 to indicate which slots in the current
frame contain valid data. It loads data slots to the current TX frame in response to the
corresponding slot request bits from the previous RX frame.
The transmitter supports data only in slots 1 to 4. The TX buffer holds data that has been
transferred using PIO or DMA, and sets the corresponding status bit. It is possible to write 20-bit
data within a 32-bit register using PIO.
In the case of a TX underrun, the HAC will transmit the current TX buffer data until the next data
arrives.
Rev.1.00 Jan. 10, 2008 Page 1288 of 1658
REJ09B0261-0100
Operation
Receiver
Transmitter

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