R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 85

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Note: Scaling (×1, ×2, ×4, or ×8) is executed according to the size of the instruction operand.
Table 3.4
Item
Privileged mode
T bit
New
Instruction
MOV
MOV.W
MOV.L
MOV
MOV.B
MOV.W
MOV.L
MOV.B
MOV.W @Rm,Rn
MOV.L
MOV.B
MOV.W Rm,@-Rn
MOV.L
MOV.B
MOV.W @Rm+,Rn
MOV.L
MOV.B
MOV.W R0,@(disp*,Rn)
MOV.L
#imm,Rn
@(disp*,PC), Rn (disp × 2 + PC + 4) → sign
@(disp*,PC), Rn (disp × 4 + PC & H'FFFF FFFC
Rm,Rn
Rm,@Rn
Rm,@Rn
Rm,@Rn
@Rm,Rn
@Rm,Rn
Rm,@-Rn
Rm,@-Rn
@Rm+,Rn
@Rm+,Rn
R0,@(disp*,Rn)
Rm,@(disp*,Rn)
Fixed-Point Transfer Instructions
Format
Value of T bit after
instruction execution
⎯
Operation
imm → sign extension → Rn
extension → Rn
+ 4) → Rn
Rm → Rn
Rm → (Rn)
Rm → (Rn)
Rm → (Rn)
(Rm) → sign extension → Rn
(Rm) → sign extension → Rn
(Rm) → Rn
Rn-1 → Rn, Rm → (Rn)
Rn-2 → Rn, Rm → (Rn)
Rn-4 → Rn, Rm → (Rn)
(Rm)→ sign extension → Rn,
Rm + 1 → Rm
(Rm) → sign extension → Rn,
Rm + 2 → Rm
(Rm) → Rn, Rm + 4 → Rm
R0 → (disp + Rn)
R0 → (disp × 2 + Rn)
Rm → (disp × 4 + Rn)
Description
"Privileged" means the instruction can only be executed
in privileged mode.
—: No change
"New" means the instruction which has been newly
added in the SH-4A with H’20-valued VER bits in the
processor version register (PVR).
Instruction Code
1110nnnniiiiiiii
1001nnnndddddddd
1101nnnndddddddd
0110nnnnmmmm0011
0010nnnnmmmm0000
0010nnnnmmmm0001
0010nnnnmmmm0010
0110nnnnmmmm0000
0110nnnnmmmm0001
0110nnnnmmmm0010
0010nnnnmmmm0100
0010nnnnmmmm0101
0010nnnnmmmm0110
0110nnnnmmmm0100
0110nnnnmmmm0101
0110nnnnmmmm0110
10000000nnnndddd
10000001nnnndddd
0001nnnnmmmmdddd
Rev.1.00 Jan. 10, 2008 Page 53 of 1658
Privileged T Bit New
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REJ09B0261-0100
3. Instruction Set
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