R8A77850ANBGV Renesas Electronics America, R8A77850ANBGV Datasheet - Page 1225

• Manufacturer Part Number: R8A77850ANBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ANBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

24.3.7
CLKON controls the transfer clock frequency and clock ON/OFF.
At this time, use a sufficiently slow clock for transfer through open-drain type output in MMC
mode.
In a command sequence, do not perform clock ON/OFF or frequency modification.
Bit
7
6 to 4
3
2
1
0
Transfer Clock Control Register (CLKON)
Bit Name
CLKON
—
CSEL3
CSEL2
CSEL1
CSEL0
Initial value:
Initial
Value
0
All 0
0
0
0
0
R/W:
Bit:
CLKON
R/W
7
0
R/W
R/W
R
R/W
R/W
R/W
R/W
⎯
R
6
0
Description
Clock On
0: Stops the transfer clock output from the MMCCLK
1: Outputs the transfer clock from the MMCCLK pin.
Reserved
These bits are always read as 0. The write value
should always be 0.
Transfer Clock Frequency Select
0000: Reserved
0001: Uses the 1/2-divided peripheral clock (Pck) as a
0010: Uses the 1/4-divided peripheral clock as a
0011: Uses the 1/8-divided peripheral clock as a
0100: Uses the 1/16-divided peripheral clock as a
0101: Uses the 1/32-divided peripheral clock as a
0110: Uses the 1/64-divided peripheral clock as a
0111: Uses the 1/128-divided peripheral clock as a
1000: Uses the 1/256-divided peripheral clock as a
1001 to 1111: Setting prohibited
⎯
R
5
0
pin.
transfer clock.
transfer clock.
transfer clock.
transfer clock.
transfer clock.
transfer clock.
transfer clock.
transfer clock.
⎯
4
0
R
CSEL3
R/W
3
0
Rev.1.00 Jan. 10, 2008 Page 1193 of 1658
CSEL2 CSEL1 CSEL0
R/W
2
0
24. Multimedia Card Interface (MMCIF)
R/W
0
1
R/W
0
0
REJ09B0261-0100