UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 185

• Manufacturer Part Number: UPD70F3737GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

or on-chip I/O registers via ports 9, CM, CT, DL, and DH. These ports control address/data I/O, the read/write strobe
signal, waits, the clock output, bus hold, and the address strobe signal.
and RAM, and external I/O devices can be connected.
5.1
The external bus interface function is used to connect external devices to areas other than the internal ROM, RAM,
The V850ES/JG3-L is provided with an external bus interface function by which external memories such as ROM
Output can be selected from a multiplexed bus with a minimum of 3 bus cycles and a separate bus with a
minimum of 2 bus cycles
An 8-bit or 16-bit data bus can be selected (specifiable for each memory block).
Wait function
• Programmable wait function of up to 7 states (specifiable for each memory block)
• External wait function using WAIT pin
Idle state insertion function
• A low-speed device can be connected by inserting an idle state after a read cycle.
Bus hold function
Misalign access is possible.
Up to 4 MB of physical memory can be connected.
Features
CHAPTER 5 BUS CONTROL FUNCTION
User’s Manual U18953EJ5V0UD
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