UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 58

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UPD70F3737GF-GAS-AX

Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3737GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
3.2.1
56
r0
r1
r2
r3
r4
r5
r6 to r29
r30
r31
PC
The program registers include general-purpose registers and a program counter.
(1) General-purpose registers (r0 to r31)
(2) Program counter (PC)
Name
Thirty-two general-purpose registers, r0 to r31, are available. Any of these registers can be used to store a
data variable or an address variable.
However, r0 and r30 are implicitly used by instructions and care must be exercised when these registers are
used. r0 always holds 0 and is used for an operation that uses 0 or addressing of offset 0. r30 is used by the
SLD and SST instructions as a base pointer when these instructions access the memory. r1, r3 to r5, and r31
are implicitly used by the assembler and C compiler. When using these registers, save their contents for
protection, and then restore the contents after using the registers. r2 is sometimes used by the real-time OS.
If the real-time OS does not use r2, it can be used as a register for variables.
Remark
The program counter holds the instruction address during program execution. The lower 32 bits of this register
are valid. Bits 31 to 26 are fixed to 0. A carry from bit 25 to 26 is ignored even if it occurs.
Bit 0 is fixed to 0. This means that execution cannot branch to an odd address.
PC
Program register set
Zero register
Assembler-reserved register
Register for address/data variable (if real-time OS does not use r2)
Stack pointer
Global pointer
Text pointer
Register for address/data variable
Element pointer
Link pointer
Program counter
31
Fixed to 0
For further details on the r1, r3 to r5, and r31 that are used in the assembler and C compiler, refer to
the CA850 (C Compiler Package) Assembly Language User’s Manual.
26 25
Usage
Instruction address during program execution
Table 3-1. Program Registers
CHAPTER 3 CPU FUNCTION
User’s Manual U18953EJ5V0UD
Always holds 0.
Used as working register to create 32-bit immediate data
Used to create a stack frame when a function is called
Used to access a global variable in the data area
Used as register that indicates the beginning of a text area (area
where program codes are located)
Used as base pointer to access memory
Used when the compiler calls a function
Holds the instruction address during program execution
Operation
1 0
0
Default value
00000000H

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