UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 284

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UPD70F3737GF-GAS-AX

Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3737GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
282
In order to transfer data from the TPnCCRa register to the CCRa buffer register, the TPnCCR1 register
must be written.
After data is written to the TPnCCR1 register, the value written to the TPnCCRa register is transferred to
the CCRa buffer register in synchronization with clearing of the 16-bit counter, and is used as the value to
be compared with the 16-bit counter value.
<1> To change both the cycle and active level width of the PWM waveform, first set the cycle to the
<2> To change only the cycle of the PWM waveform, first set the cycle to the TPnCCR0 register, and
<3> To change only the active level width (duty factor) of the PWM waveform, only the TPnCCR1
Caution To rewrite the TPnCCR0 or TPnCCR1 register after writing the TPnCCR1 register, do so
Remark
TPnCCR0 register and then set the active level width to the TPnCCR1 register.
then write the same value to the TPnCCR1 register (that is, the same value as the value already
specified for the TPnCCR1 register).
register has to be set.
after the INTTPnCC0 signal has been generated; otherwise, the value of the CCRa
buffer register may become undefined because the timing of transferring data from
the TPnCCRa register to the CCRa buffer register conflicts with writing the TPnCCRa
register.
a = 0, 1
n = 0-5
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
User’s Manual U18953EJ5V0UD

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