UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 872
UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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24.4.2 Reset operation by watchdog timer 2
(WDT2RES signal generation), a system reset is executed and the hardware is initialized to the initial status.
and then the reset status ends automatically.
870
Main clock oscillator (f
Subclock oscillator (f
Internal oscillator
Peripheral clock (f
Internal system clock (f
CPU clock (f
CPU
Watchdog timer 2
RTC
Internal RAM
I/O lines (ports/alternate-function
pins)
On-chip peripheral I/O register
On-chip peripheral functions other
than above
When watchdog timer 2 is set to the reset operation mode due to overflow, upon watchdog timer 2 overflow
Following watchdog timer 2 overflow, the reset status is entered and lasts the predetermined time (analog delay),
The main clock oscillator is stopped during the reset period.
Note
Note
μ
PD70F3792, 70F3793 only.
CPU
)
Item
XX
to f
XT
Table 24-2. Hardware Status During Watchdog Timer 2 Reset Operation
X
)
)
XX
XX
),
/1,024)
Operation stops.
Undefined if power-on reset or CPU access and reset input conflict (data is damaged).
Oscillation stops.
Oscillation continues.
Oscillation stops.
Operation stops.
Initialized
Operation stops (initialized to 0).
Operation continues
Otherwise value immediately after reset input is retained.
High impedance
Initialized to specified status, OCDM register retains its value.
Operation stops.
CHAPTER 24 RESET FUNCTION
User’s Manual U18953EJ5V0UD
During Reset
Oscillation starts.
Operation starts after securing oscillation
stabilization time.
Operation starts after securing oscillation
stabilization time (initialized to f
Program execution after securing
oscillation stabilization time
Counts up from 0 with internal oscillator
clock as source clock.
Operation can be started after securing
oscillation stabilization time.
Oscillation starts.
After Reset
XX
/8).
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